]> git.karo-electronics.de Git - linux-beck.git/commitdiff
ARM: shmobile: r8a7778: add MSTP clock assignments to DT
authorUlrich Hecht <ulrich.hecht+renesas@gmail.com>
Mon, 16 Feb 2015 16:58:50 +0000 (17:58 +0100)
committerSimon Horman <horms+renesas@verge.net.au>
Mon, 23 Feb 2015 21:40:47 +0000 (06:40 +0900)
Assigns clocks to i2c*, tmu*, scif*, mmcif, sdhi*, and hspi*.

Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm/boot/dts/r8a7778.dtsi

index 822ba900313834febfc6dd1a724890355c12dfaa..5c347e8d7dede8e2780bb4f05f670f75b93156c1 100644 (file)
                compatible = "renesas,i2c-r8a7778";
                reg = <0xffc70000 0x1000>;
                interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp0_clks R8A7778_CLK_I2C0>;
                status = "disabled";
        };
 
                compatible = "renesas,i2c-r8a7778";
                reg = <0xffc71000 0x1000>;
                interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp0_clks R8A7778_CLK_I2C1>;
                status = "disabled";
        };
 
                compatible = "renesas,i2c-r8a7778";
                reg = <0xffc72000 0x1000>;
                interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp0_clks R8A7778_CLK_I2C2>;
                status = "disabled";
        };
 
                compatible = "renesas,i2c-r8a7778";
                reg = <0xffc73000 0x1000>;
                interrupts = <0 77 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp0_clks R8A7778_CLK_I2C3>;
                status = "disabled";
        };
 
                interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>,
                             <0 33 IRQ_TYPE_LEVEL_HIGH>,
                             <0 34 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp0_clks R8A7778_CLK_TMU0>;
+               clock-names = "fck";
 
                #renesas,channels = <3>;
 
                interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>,
                             <0 37 IRQ_TYPE_LEVEL_HIGH>,
                             <0 38 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp0_clks R8A7778_CLK_TMU1>;
+               clock-names = "fck";
 
                #renesas,channels = <3>;
 
                interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>,
                             <0 41 IRQ_TYPE_LEVEL_HIGH>,
                             <0 42 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp0_clks R8A7778_CLK_TMU2>;
+               clock-names = "fck";
 
                #renesas,channels = <3>;
 
                compatible = "renesas,scif-r8a7778", "renesas,scif";
                reg = <0xffe40000 0x100>;
                interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp0_clks R8A7778_CLK_SCIF0>;
+               clock-names = "sci_ick";
                status = "disabled";
        };
 
                compatible = "renesas,scif-r8a7778", "renesas,scif";
                reg = <0xffe41000 0x100>;
                interrupts = <0 71 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp0_clks R8A7778_CLK_SCIF1>;
+               clock-names = "sci_ick";
                status = "disabled";
        };
 
                compatible = "renesas,scif-r8a7778", "renesas,scif";
                reg = <0xffe42000 0x100>;
                interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp0_clks R8A7778_CLK_SCIF2>;
+               clock-names = "sci_ick";
                status = "disabled";
        };
 
                compatible = "renesas,scif-r8a7778", "renesas,scif";
                reg = <0xffe43000 0x100>;
                interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp0_clks R8A7778_CLK_SCIF3>;
+               clock-names = "sci_ick";
                status = "disabled";
        };
 
                compatible = "renesas,scif-r8a7778", "renesas,scif";
                reg = <0xffe44000 0x100>;
                interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp0_clks R8A7778_CLK_SCIF4>;
+               clock-names = "sci_ick";
                status = "disabled";
        };
 
                compatible = "renesas,scif-r8a7778", "renesas,scif";
                reg = <0xffe45000 0x100>;
                interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp0_clks R8A7778_CLK_SCIF5>;
+               clock-names = "sci_ick";
                status = "disabled";
        };
 
                compatible = "renesas,sh-mmcif";
                reg = <0xffe4e000 0x100>;
                interrupts = <0 61 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp3_clks R8A7778_CLK_MMC>;
                status = "disabled";
        };
 
                compatible = "renesas,sdhi-r8a7778";
                reg = <0xffe4c000 0x100>;
                interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp3_clks R8A7778_CLK_SDHI0>;
                status = "disabled";
        };
 
                compatible = "renesas,sdhi-r8a7778";
                reg = <0xffe4d000 0x100>;
                interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp3_clks R8A7778_CLK_SDHI1>;
                status = "disabled";
        };
 
                compatible = "renesas,sdhi-r8a7778";
                reg = <0xffe4f000 0x100>;
                interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp3_clks R8A7778_CLK_SDHI2>;
                status = "disabled";
        };
 
                compatible = "renesas,hspi-r8a7778", "renesas,hspi";
                reg = <0xfffc7000 0x18>;
                interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp0_clks R8A7778_CLK_HSPI>;
                #address-cells = <1>;
                #size-cells = <0>;
                status = "disabled";
                compatible = "renesas,hspi-r8a7778", "renesas,hspi";
                reg = <0xfffc8000 0x18>;
                interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp0_clks R8A7778_CLK_HSPI>;
                #address-cells = <1>;
                #size-cells = <0>;
                status = "disabled";
                compatible = "renesas,hspi-r8a7778", "renesas,hspi";
                reg = <0xfffc6000 0x18>;
                interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp0_clks R8A7778_CLK_HSPI>;
                #address-cells = <1>;
                #size-cells = <0>;
                status = "disabled";