ARM: socfpga: dts: Add resets for EMACs on Arria10

Add the reset property for the EMAC controllers on Arria10.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>

diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
index 1d341dc3e598ac11ac9e54be23fbf2d094843d98..98c5506c2a35531529e6e62ff9cefd6f532ae172 100644 (file)
--- a/arch/arm/boot/dts/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
@@ -16,6 +16,7 @@
 
 #include "skeleton.dtsi"
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/reset/altr,rst-mgr-a10.h>
 
 / {
        #address-cells = <1>;
@@ -409,6 +410,8 @@
                        rx-fifo-depth = <16384>;
                        clocks = <&l4_mp_clk>;
                        clock-names = "stmmaceth";
+                       resets = <&rst EMAC0_RESET>;
+                       reset-names = "stmmaceth";
                        status = "disabled";
                };
 
@@ -426,6 +429,8 @@
                        rx-fifo-depth = <16384>;
                        clocks = <&l4_mp_clk>;
                        clock-names = "stmmaceth";
+                       resets = <&rst EMAC1_RESET>;
+                       reset-names = "stmmaceth";
                        status = "disabled";
                };