Conflicts:
Documentation/devicetree/bindings/ata/ahci-platform.txt
arch/arm/boot/dts/highbank.dts
- reg : <registers mapping>
Optional properties:
+- calxeda,port-phys: phandle-combophy and lane assignment, which maps each
+ SATA port to a combophy and a lane within that
+ combophy
+ - dma-coherent : Present if dma operations are coherent
Example:
sata@ffe08000 {
compatible = "calxeda,hb-ahci";
reg = <0xffe08000 0x10000>;
interrupts = <0 83 4>;
+ calxeda,port-phys = <&combophy5 0 &combophy0 0
+ &combophy0 1 &combophy0 2
+ &combophy0 3>;
+ dma-coherent;
};
sdhci@ffe0e000 {