ENGR00160112-1 MX6: Set csi0 and camera control pin pad configuration

Set csi0 and camera control pin pad configuration

Signed-off-by: Yuxi Sun <b36102@freescale.com>

diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx6q.h b/arch/arm/plat-mxc/include/mach/iomux-mx6q.h
index ce2624390c7a9860684dc91aa3d111338abdd77c..c48fe755cac623616ecc3bea58d22fed74ccc7e3 100644 (file)
--- a/arch/arm/plat-mxc/include/mach/iomux-mx6q.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx6q.h
@@ -41,6 +41,9 @@ typedef enum iomux_config {
 
 #define NON_MUX_I       0x3FF
 #define NON_PAD_I       0x7FF
+#define MX6Q_CCM_CLK0_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |    \
+               PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW |        \
+               PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
 
 #define MX6Q_HIGH_DRV  (PAD_CTL_DSE_120ohm)
 #define MX6Q_UART_PAD_CTRL     (PAD_CTL_PKE | PAD_CTL_PUE |    \
@@ -5831,7 +5834,7 @@ typedef enum iomux_config {
                (_MX6Q_PAD_KEY_ROW4__PL301_MX6QPER1_HADDR_8 | MUX_PAD_CTRL(NO_PAD_CTRL))
 
 #define  MX6Q_PAD_GPIO_0__CCM_CLKO             \
-               (_MX6Q_PAD_GPIO_0__CCM_CLKO | MUX_PAD_CTRL(NO_PAD_CTRL))
+               (_MX6Q_PAD_GPIO_0__CCM_CLKO | MUX_PAD_CTRL(MX6Q_CCM_CLK0_PAD_CTRL))
 #define  MX6Q_PAD_GPIO_0__KPP_COL_5            \
                (_MX6Q_PAD_GPIO_0__KPP_COL_5 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define  MX6Q_PAD_GPIO_0__ASRC_ASRC_EXT_CLK            \
@@ -6060,7 +6063,7 @@ typedef enum iomux_config {
 #define  MX6Q_PAD_GPIO_19__ECSPI1_RDY          \
                (_MX6Q_PAD_GPIO_19__ECSPI1_RDY | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define  MX6Q_PAD_GPIO_19__GPIO_4_5            \
-               (_MX6Q_PAD_GPIO_19__GPIO_4_5 | MUX_PAD_CTRL(NO_PAD_CTRL))
+               (_MX6Q_PAD_GPIO_19__GPIO_4_5 | MUX_PAD_CTRL(MX6Q_HIGH_DRV))
 #define  MX6Q_PAD_GPIO_19__ENET_TX_ER          \
                (_MX6Q_PAD_GPIO_19__ENET_TX_ER | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define  MX6Q_PAD_GPIO_19__SRC_INT_BOOT                \
@@ -6152,7 +6155,7 @@ typedef enum iomux_config {
 #define  MX6Q_PAD_CSI0_DAT5__AUDMUX_AUD3_TXD           \
                (_MX6Q_PAD_CSI0_DAT5__AUDMUX_AUD3_TXD | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define  MX6Q_PAD_CSI0_DAT5__GPIO_5_23         \
-               (_MX6Q_PAD_CSI0_DAT5__GPIO_5_23 | MUX_PAD_CTRL(NO_PAD_CTRL))
+               (_MX6Q_PAD_CSI0_DAT5__GPIO_5_23 | MUX_PAD_CTRL(MX6Q_HIGH_DRV))
 #define  MX6Q_PAD_CSI0_DAT5__MMDC_MMDC_DEBUG_44                \
                (_MX6Q_PAD_CSI0_DAT5__MMDC_MMDC_DEBUG_44 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define  MX6Q_PAD_CSI0_DAT5__CHEETAH_TRACE_2           \