Most Renesas irqpin controllers have 4-bit sense fields, however, some
have different widths. This patch adds a DT binding to optionally
specify such non-standard values.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
--- /dev/null
+DT bindings for the R-/SH-Mobile irqpin controller
+
+Required properties:
+
+- compatible: has to be "renesas,intc-irqpin"
+- #interrupt-cells: has to be <2>
+
+Optional properties:
+
+- any properties, listed in interrupts.txt in this directory, and any standard
+ resource allocation properties
+- sense-bitfield-width: width of a single sense bitfield in the SENSE register,
+ if different from the default 4 bits
*/
#include <linux/init.h>
+#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/spinlock.h>
#include <linux/interrupt.h>
/* deal with driver instance configuration */
if (pdata)
memcpy(&p->config, pdata, sizeof(*pdata));
+ else
+ of_property_read_u32(pdev->dev.of_node, "sense-bitfield-width",
+ &p->config.sense_bitfield_width);
if (!p->config.sense_bitfield_width)
p->config.sense_bitfield_width = 4; /* default to 4 bits */