drm/imx: ipuv3-plane: Configure DMFC wait4eot bit after slots are determined

Just as the function ipu_dmfc_config_wait4eot() tells, the DMFC wait4eot bit
depends on the number of DMFC slots to be used, so it should be called after
the slots are determined in the function ipu_dmfc_alloc_bandwidth().
Based on tests, this patch may eliminate display distortion issue on overlay
plane with small resolutions.  To reproduce the issue, we may run this drm
modetest case - 'modetest -P 19:64x64'.

Signed-off-by: Liu Ying <gnuiyl@gmail.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>

diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3-plane.c
index f4d8d341699bdc1a968eb912bde5b4107ba10df3..681ec6eb77d916fc3be6a47d783fab54ed1f07fb 100644 (file)
--- a/drivers/gpu/drm/imx/ipuv3-plane.c
+++ b/drivers/gpu/drm/imx/ipuv3-plane.c
@@ -280,8 +280,6 @@ int ipu_plane_mode_set(struct ipu_plane *ipu_plane, struct drm_crtc *crtc,
                }
        }
 
-       ipu_dmfc_config_wait4eot(ipu_plane->dmfc, crtc_w);
-
        ret = ipu_dmfc_alloc_bandwidth(ipu_plane->dmfc,
                        calc_bandwidth(crtc_w, crtc_h,
                                       calc_vref(mode)), 64);
@@ -290,6 +288,8 @@ int ipu_plane_mode_set(struct ipu_plane *ipu_plane, struct drm_crtc *crtc,
                return ret;
        }
 
+       ipu_dmfc_config_wait4eot(ipu_plane->dmfc, crtc_w);
+
        ipu_cpmem_zero(ipu_plane->ipu_ch);
        ipu_cpmem_set_resolution(ipu_plane->ipu_ch, src_w, src_h);
        ret = ipu_cpmem_set_fmt(ipu_plane->ipu_ch, fb->pixel_format);