]> git.karo-electronics.de Git - karo-tx-linux.git/commitdiff
Merge branch 'next-samsung-devel' into next-samsung-devel-2
authorKukjin Kim <kgene.kim@samsung.com>
Wed, 28 Sep 2011 12:55:09 +0000 (21:55 +0900)
committerKukjin Kim <kgene.kim@samsung.com>
Wed, 28 Sep 2011 12:56:40 +0000 (21:56 +0900)
Conflicts:
arch/arm/mach-exynos4/Kconfig
arch/arm/mach-exynos4/Makefile
arch/arm/mach-exynos4/clock.c
arch/arm/mach-exynos4/mach-origen.c
arch/arm/mach-s3c2412/gpio.c
arch/arm/mach-s5p64x0/dma.c
arch/arm/mach-s5p64x0/gpiolib.c

19 files changed:
1  2 
arch/arm/Kconfig
arch/arm/mach-exynos4/Kconfig
arch/arm/mach-exynos4/clock.c
arch/arm/mach-exynos4/cpu.c
arch/arm/mach-exynos4/include/mach/map.h
arch/arm/mach-exynos4/mach-smdkv310.c
arch/arm/mach-exynos4/pm.c
arch/arm/mach-s3c2412/dma.c
arch/arm/mach-s3c2443/clock.c
arch/arm/mach-s3c64xx/mach-crag6410.c
arch/arm/mach-s5p64x0/dma.c
arch/arm/mach-s5p64x0/mach-smdk6440.c
arch/arm/mach-s5p64x0/mach-smdk6450.c
arch/arm/mach-s5pv210/Kconfig
arch/arm/mach-s5pv210/clock.c
arch/arm/plat-s5p/include/plat/pll.h
arch/arm/plat-s5p/irq-gpioint.c
arch/arm/plat-samsung/Makefile
arch/arm/plat-samsung/include/plat/dma-s3c24xx.h

Simple merge
index c595bb03f417c376350bf646df049447917cfcd5,d04530f4cb46d3d43f4e2880d6521efc6f65a2e0..d0491c27a63ca4004d090ac23503cbab3de3cee5
@@@ -213,10 -240,21 +232,21 @@@ config MACH_NUR
  config MACH_ORIGEN
        bool "ORIGEN"
        select CPU_EXYNOS4210
 -      select S3C_DEV_RTC
 -      select S3C_DEV_WDT
+       select S3C_DEV_HSMMC
+       select S3C_DEV_HSMMC2
 +      select S3C_DEV_RTC
 +      select S3C_DEV_WDT
-       select S3C_DEV_HSMMC2
+       select S5P_DEV_FIMC0
+       select S5P_DEV_FIMC1
+       select S5P_DEV_FIMC2
+       select S5P_DEV_FIMC3
+       select S5P_DEV_I2C_HDMIPHY
 -      select S5P_DEV_USB_EHCI
+       select S5P_DEV_TV
++      select S5P_DEV_USB_EHCI
+       select SAMSUNG_DEV_BACKLIGHT
+       select SAMSUNG_DEV_PWM
        select EXYNOS4_SETUP_SDHCI
+       select EXYNOS4_SETUP_USB_PHY
        help
          Machine support for ORIGEN based on Samsung EXYNOS4210
  
index 413c7cc81979f47ee6dcf0923063440effaa9f29,c99ed1878699b266387b467835c2ba66abb4fd82..a25c818367590dc7345c655567737f33b624f650
@@@ -1241,31 -1389,12 +1443,34 @@@ void __init_or_cpufreq exynos4_setup_cl
  }
  
  static struct clk *clks[] __initdata = {
-       /* Nothing here yet */
+       &clk_sclk_hdmi27m,
+       &clk_sclk_hdmiphy,
+       &clk_sclk_usbphy0,
+       &clk_sclk_usbphy1,
  };
  
 +#ifdef CONFIG_PM_SLEEP
 +static int exynos4_clock_suspend(void)
 +{
 +      s3c_pm_do_save(exynos4_clock_save, ARRAY_SIZE(exynos4_clock_save));
 +      return 0;
 +}
 +
 +static void exynos4_clock_resume(void)
 +{
 +      s3c_pm_do_restore_core(exynos4_clock_save, ARRAY_SIZE(exynos4_clock_save));
 +}
 +
 +#else
 +#define exynos4_clock_suspend NULL
 +#define exynos4_clock_resume NULL
 +#endif
 +
 +struct syscore_ops exynos4_clock_syscore_ops = {
 +      .suspend        = exynos4_clock_suspend,
 +      .resume         = exynos4_clock_resume,
 +};
 +
  void __init exynos4_register_clocks(void)
  {
        int ptr;
        s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
        s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
  
 +      register_syscore_ops(&exynos4_clock_syscore_ops);
+       s3c24xx_register_clock(&dummy_apb_pclk);
        s3c_pwmclk_init();
  }
Simple merge
index a16eb569a3e69e06a161d57526629cf4ad66c69b,43738c086bc0c83dec17d07746d3f242abd0be2c..35a763e9a659b98c764dc2c6adfe2a4be0774349
@@@ -254,10 -210,10 +276,12 @@@ static struct platform_device *smdkv310
        &exynos4_device_sysmmu,
        &samsung_asoc_dma,
        &samsung_asoc_idma,
 +      &s5p_device_fimd0,
 +      &smdkv310_lcd_lte480wv,
        &smdkv310_smsc911x,
        &exynos4_device_ahci,
+       &s5p_device_hdmi,
+       &s5p_device_mixer,
  };
  
  static void __init smdkv310_smsc911x_init(void)
@@@ -316,9 -292,12 +360,13 @@@ static void __init smdkv310_machine_ini
        samsung_keypad_set_platdata(&smdkv310_keypad_data);
  
        samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data);
 +      s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata);
  
+       smdkv310_ehci_init();
+       clk_xusbxti.rate = 24000000;
        platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
+       s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev;
  }
  
  MACHINE_START(SMDKV310, "SMDKV310")
        .map_io         = smdkv310_map_io,
        .init_machine   = smdkv310_machine_init,
        .timer          = &exynos4_timer,
+       .reserve        = &smdkv310_reserve,
  MACHINE_END
 +
 +MACHINE_START(SMDKC210, "SMDKC210")
 +      /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
 +      .boot_params    = S5P_PA_SDRAM + 0x100,
 +      .init_irq       = exynos4_init_irq,
 +      .map_io         = smdkv310_map_io,
 +      .init_machine   = smdkv310_machine_init,
 +      .timer          = &exynos4_timer,
 +MACHINE_END
Simple merge
Simple merge
Simple merge
Simple merge
index 0e5b3e63e5b3f388382dc54cb68b31e05677b8f4,aebf3fcb1ebe19244833fee86a0f7a5bafa9ce92..442dd4ad12da61a02694e97923ca53386a7854ad
  #include <mach/map.h>
  #include <mach/irqs.h>
  #include <mach/regs-clock.h>
+ #include <mach/dma.h>
  
 +#include <plat/cpu.h>
  #include <plat/devs.h>
- #include <plat/s3c-pl330-pdata.h>
+ #include <plat/irqs.h>
  
  static u64 dma_dmamask = DMA_BIT_MASK(32);
  
index 340f30f4a3da1ab54120c235792be436e089112c,39026e9d5f3c31789c5f5c4827e8f522cd98a774..b0465d4e84e7aac8e358db7541eb55e04ffa6956
@@@ -147,9 -213,20 +207,20 @@@ static void __init smdk6440_map_io(void
        s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
  }
  
+ static void s5p6440_set_lcd_interface(void)
+ {
+       unsigned int cfg;
+       /* select TFT LCD type (RGB I/F) */
+       cfg = __raw_readl(S5P64X0_SPCON0);
+       cfg &= ~S5P64X0_SPCON0_LCD_SEL_MASK;
+       cfg |= S5P64X0_SPCON0_LCD_SEL_RGB;
+       __raw_writel(cfg, S5P64X0_SPCON0);
+ }
  static void __init smdk6440_machine_init(void)
  {
 -      s3c24xx_ts_set_platdata(&s3c_ts_platform);
 +      s3c24xx_ts_set_platdata(NULL);
  
        s3c_i2c0_set_platdata(&s5p6440_i2c0_data);
        s3c_i2c1_set_platdata(&s5p6440_i2c1_data);
index ee0da14665b6d8d2c1481211402734b6e0a66e01,92b5de1465b7551ba0d50e72b84c88952f90aae4..2a69caa70afd648cd8b82ee035642394725286c5
@@@ -166,9 -233,20 +227,20 @@@ static void __init smdk6450_map_io(void
        s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
  }
  
+ static void s5p6450_set_lcd_interface(void)
+ {
+       unsigned int cfg;
+       /* select TFT LCD type (RGB I/F) */
+       cfg = __raw_readl(S5P64X0_SPCON0);
+       cfg &= ~S5P64X0_SPCON0_LCD_SEL_MASK;
+       cfg |= S5P64X0_SPCON0_LCD_SEL_RGB;
+       __raw_writel(cfg, S5P64X0_SPCON0);
+ }
  static void __init smdk6450_machine_init(void)
  {
 -      s3c24xx_ts_set_platdata(&s3c_ts_platform);
 +      s3c24xx_ts_set_platdata(NULL);
  
        s3c_i2c0_set_platdata(&s5p6450_i2c0_data);
        s3c_i2c1_set_platdata(&s5p6450_i2c1_data);
index aaeb44a73716349f5fa3e18a165b229ced31f18f,e2d1d9e9a4985b69e2aba896628fa7f595599df1..f22c683272d3d48f19e7a40a00f8452b594646fb
@@@ -11,9 -11,10 +11,9 @@@ if ARCH_S5PV21
  
  config CPU_S5PV210
        bool
-       select S3C_PL330_DMA
+       select SAMSUNG_DMADEV
        select S5P_EXT_INT
        select S5P_HRT
 -      select S5PV210_PM if PM
        help
          Enable S5PV210 CPU support
  
Simple merge
Simple merge
Simple merge
Simple merge