Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus

Pull MIPS fixes from Ralf Baechle:
 "Fixes for a number of small glitches in various corners of the MIPS
  tree.  No particular areas is standing out.

  With this applied all MIPS defconfigs are building fine.  No merge
  conflicts are expected."

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus:
  MIPS: Delete definition of SA_RESTORER.
  MIPS: Fix ISA level which causes secondary cache init bypassing and more
  MIPS: Fix build error cavium-octeon without CONFIG_SMP
  MIPS: Kconfig: Rename SNIPROM too
  MIPS: Alchemy: Fix typo "CONFIG_DEBUG_PCI"
  MIPS: Unbreak function tracer for 64-bit kernel.

diff --combined arch/mips/Kconfig
index a6fdd16439036b23a68ebb05a896619950d9ab8a,b2df4760475967b9925877122da56559027c398d..51244bf972718a54876e7ba2ab78ae1790c98e59
--- 1/arch/mips/Kconfig
--- 2/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@@ -18,7 -18,7 +18,7 @@@ config MIP
        select HAVE_KRETPROBES
        select HAVE_DEBUG_KMEMLEAK
        select ARCH_BINFMT_ELF_RANDOMIZE_PIE
 -      select HAVE_ARCH_TRANSPARENT_HUGEPAGE
 +      select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT
        select RTC_LIB if !MACH_LOONGSON
        select GENERIC_ATOMIC64 if !64BIT
        select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
@@@ -657,7 -657,7 +657,7 @@@ config SNI_R
        bool "SNI RM200/300/400"
        select FW_ARC if CPU_LITTLE_ENDIAN
        select FW_ARC32 if CPU_LITTLE_ENDIAN
-       select SNIPROM if CPU_BIG_ENDIAN
+       select FW_SNIPROM if CPU_BIG_ENDIAN
        select ARCH_MAY_HAVE_PC_FDC
        select BOOT_ELF32
        select CEVT_R4K
@@@ -1144,7 -1144,7 +1144,7 @@@ config DEFAULT_SGI_PARTITIO
  config FW_ARC32
        bool
  
- config SNIPROM
+ config FW_SNIPROM
        bool
  
  config BOOT_ELF32
@@@ -1493,6 -1493,7 +1493,6 @@@ config CPU_XL
        select CPU_SUPPORTS_32BIT_KERNEL
        select CPU_SUPPORTS_64BIT_KERNEL
        select CPU_SUPPORTS_HIGHMEM
 -      select CPU_HAS_LLSC
        select WEAK_ORDERING
        select WEAK_REORDERING_BEYOND_LLSC
        select CPU_HAS_PREFETCH

diff --combined arch/mips/kernel/cpu-probe.c
index d069a19112e8b2e90bc59092bf05abe631df028d,ed80c38443456a07da0a7aec86260531ad8d3b6b..5fe66a0c32245366bc56079eca0a160a7b9bc0cb
--- 1/arch/mips/kernel/cpu-probe.c
--- 2/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@@ -580,9 -580,6 +580,9 @@@ static inline void cpu_probe_legacy(str
                c->tlbsize = 48;
                break;
        case PRID_IMP_VR41XX:
 +              set_isa(c, MIPS_CPU_ISA_III);
 +              c->options = R4K_OPTS;
 +              c->tlbsize = 32;
                switch (c->processor_id & 0xf0) {
                case PRID_REV_VR4111:
                        c->cputype = CPU_VR4111;
@@@ -607,7 -604,6 +607,7 @@@
                                __cpu_name[cpu] = "NEC VR4131";
                        } else {
                                c->cputype = CPU_VR4133;
 +                              c->options |= MIPS_CPU_LLSC;
                                __cpu_name[cpu] = "NEC VR4133";
                        }
                        break;
@@@ -617,6 -613,9 +617,6 @@@
                        __cpu_name[cpu] = "NEC Vr41xx";
                        break;
                }
 -              set_isa(c, MIPS_CPU_ISA_III);
 -              c->options = R4K_OPTS;
 -              c->tlbsize = 32;
                break;
        case PRID_IMP_R4300:
                c->cputype = CPU_R4300;
@@@ -1227,10 -1226,8 +1227,8 @@@ __cpuinit void cpu_probe(void
        if (c->options & MIPS_CPU_FPU) {
                c->fpu_id = cpu_get_fpu_id();
  
-               if (c->isa_level == MIPS_CPU_ISA_M32R1 ||
-                   c->isa_level == MIPS_CPU_ISA_M32R2 ||
-                   c->isa_level == MIPS_CPU_ISA_M64R1 ||
-                   c->isa_level == MIPS_CPU_ISA_M64R2) {
+               if (c->isa_level & (MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M32R2 |
+                                   MIPS_CPU_ISA_M64R1 | MIPS_CPU_ISA_M64R2)) {
                        if (c->fpu_id & MIPS_FPIR_3D)
                                c->ases |= MIPS_ASE_MIPS3D;
                }