mx31: Introduce mx31_set_gpr function

Introduce mx31_set_gpr function for setting the GPR (General Purpose Register) on MX31.

This function can be useful for setting a group of pins into tied to some specific peripherals.

Reuse this function from the linux kernel.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

diff --git a/arch/arm/cpu/arm1136/mx31/generic.c b/arch/arm/cpu/arm1136/mx31/generic.c
index 78df7b9261b11625a8d70199732ebbc84de8f308..4f27e250bd9c78d5e77c69af99db842b99b93843 100644 (file)
--- a/arch/arm/cpu/arm1136/mx31/generic.c
+++ b/arch/arm/cpu/arm1136/mx31/generic.c
@@ -27,6 +27,8 @@
 #include <asm/io.h>
 #include <asm/arch/sys_proto.h>
 
+#define IOMUXGPR       (IOMUXC_BASE + 0x008)
+
 static u32 mx31_decode_pll(u32 reg, u32 infreq)
 {
        u32 mfi = GET_PLL_MFI(reg);
@@ -141,6 +143,19 @@ void mx31_set_pad(enum iomux_pins pin, u32 config)
 
 }
 
+void mx31_set_gpr(enum iomux_gp_func gp, char en)
+{
+       u32 l;
+
+       l = readl(IOMUXGPR);
+       if (en)
+               l |= gp;
+       else
+               l &= ~gp;
+
+       writel(l, IOMUXGPR);
+}
+
 void mxc_setup_weimcs(int cs, const struct mxc_weimcs *weimcs)
 {
        struct mx31_weim *weim = (struct mx31_weim *) WEIM_BASE;

diff --git a/arch/arm/include/asm/arch-mx31/clock.h b/arch/arm/include/asm/arch-mx31/clock.h
index 2e3bce2c31295b4f7f36b41f80fb5a6cc94622cc..3e22d9a9975db034ffd704f56a574db5ca08e5ce 100644 (file)
--- a/arch/arm/include/asm/arch-mx31/clock.h
+++ b/arch/arm/include/asm/arch-mx31/clock.h
@@ -37,6 +37,7 @@ unsigned int mxc_get_clock(enum mxc_clock clk);
 extern u32 imx_get_uartclk(void);
 extern void mx31_gpio_mux(unsigned long mode);
 extern void mx31_set_pad(enum iomux_pins pin, u32 config);
+extern void mx31_set_gpr(enum iomux_gp_func gp, char en);
 
 void mx31_uart1_hw_init(void);
 void mx31_spi2_hw_init(void);

diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h b/arch/arm/include/asm/arch-mx31/imx-regs.h
index 552c8214e47ee7c0b9df3e1416a14c0b6630ff64..6ce008d6d1ab51ba25a00350a3d057d81bc255b3 100644 (file)
--- a/arch/arm/include/asm/arch-mx31/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx31/imx-regs.h
@@ -468,6 +468,44 @@ enum iomux_pins {
        MX31_PIN_CAPTURE        = IOMUX_PIN(7,    327),
 };
 
+/*
+ * various IOMUX general purpose functions
+ */
+enum iomux_gp_func {
+       MUX_PGP_FIRI                    = 1 << 0,
+       MUX_DDR_MODE                    = 1 << 1,
+       MUX_PGP_CSPI_BB                 = 1 << 2,
+       MUX_PGP_ATA_1                   = 1 << 3,
+       MUX_PGP_ATA_2                   = 1 << 4,
+       MUX_PGP_ATA_3                   = 1 << 5,
+       MUX_PGP_ATA_4                   = 1 << 6,
+       MUX_PGP_ATA_5                   = 1 << 7,
+       MUX_PGP_ATA_6                   = 1 << 8,
+       MUX_PGP_ATA_7                   = 1 << 9,
+       MUX_PGP_ATA_8                   = 1 << 10,
+       MUX_PGP_UH2                     = 1 << 11,
+       MUX_SDCTL_CSD0_SEL              = 1 << 12,
+       MUX_SDCTL_CSD1_SEL              = 1 << 13,
+       MUX_CSPI1_UART3                 = 1 << 14,
+       MUX_EXTDMAREQ2_MBX_SEL          = 1 << 15,
+       MUX_TAMPER_DETECT_EN            = 1 << 16,
+       MUX_PGP_USB_4WIRE               = 1 << 17,
+       MUX_PGP_USB_COMMON              = 1 << 18,
+       MUX_SDHC_MEMSTICK1              = 1 << 19,
+       MUX_SDHC_MEMSTICK2              = 1 << 20,
+       MUX_PGP_SPLL_BYP                = 1 << 21,
+       MUX_PGP_UPLL_BYP                = 1 << 22,
+       MUX_PGP_MSHC1_CLK_SEL           = 1 << 23,
+       MUX_PGP_MSHC2_CLK_SEL           = 1 << 24,
+       MUX_CSPI3_UART5_SEL             = 1 << 25,
+       MUX_PGP_ATA_9                   = 1 << 26,
+       MUX_PGP_USB_SUSPEND             = 1 << 27,
+       MUX_PGP_USB_OTG_LOOPBACK        = 1 << 28,
+       MUX_PGP_USB_HS1_LOOPBACK        = 1 << 29,
+       MUX_PGP_USB_HS2_LOOPBACK        = 1 << 30,
+       MUX_CLKO_DDR_MODE               = 1 << 31,
+};
+
 /* Bit definitions for RCSR register in CCM */
 #define CCM_RCSR_NF16B (1 << 31)
 #define CCM_RCSR_NFMS  (1 << 30)