void (*trigger)(struct spi_imx_data *);
int (*rx_available)(struct spi_imx_data *);
void (*reset)(struct spi_imx_data *);
+ unsigned int fifosize;
};
struct spi_imx_data {
.trigger = mx1_trigger,
.rx_available = mx1_rx_available,
.reset = mx1_reset,
+ .fifosize = 8,
},
#endif
#ifdef CONFIG_SPI_IMX_VER_0_0
.trigger = mx27_trigger,
.rx_available = mx27_rx_available,
.reset = spi_imx0_0_reset,
+ .fifosize = 8,
},
#endif
#ifdef CONFIG_SPI_IMX_VER_0_4
.trigger = mx31_trigger,
.rx_available = mx31_rx_available,
.reset = spi_imx0_4_reset,
+ .fifosize = 8,
},
#endif
#ifdef CONFIG_SPI_IMX_VER_0_7
.trigger = mx31_trigger,
.rx_available = mx31_rx_available,
.reset = spi_imx0_4_reset,
+ .fifosize = 8,
},
#endif
#ifdef CONFIG_SPI_IMX_VER_2_3
.trigger = spi_imx2_3_trigger,
.rx_available = spi_imx2_3_rx_available,
.reset = spi_imx2_3_reset,
+ .fifosize = 64,
},
#endif
};
static void spi_imx_push(struct spi_imx_data *spi_imx)
{
- while (spi_imx->txfifo < 8) {
+ while (spi_imx->txfifo < spi_imx->devtype_data.fifosize) {
if (!spi_imx->count)
break;
spi_imx->tx(spi_imx);