ARM: tegra: add clock source of PMC to device trees

Adding the bindings of the clock source of PMC in DT.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>

diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
index b5846e21cc2e53306fdba8304bf9cf12a6595126..ee529b17cb9f7d26ec69033113abb8aee9f1a753 100644 (file)
--- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
+++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
@@ -1,9 +1,15 @@
 NVIDIA Tegra Power Management Controller (PMC)
 
-Properties:
+Required properties:
 - name : Should be pmc
 - compatible : Should contain "nvidia,tegra<chip>-pmc".
 - reg : Offset and length of the register set for the device
+- clocks : Must contain an entry for each entry in clock-names.
+- clock-names : Must include the following entries:
+  "pclk" (The Tegra clock of that name),
+  "clk32k_in" (The 32KHz clock input to Tegra).
+
+Optional properties:
 - nvidia,invert-interrupt : If present, inverts the PMU interrupt signal.
   The PMU is an external Power Management Unit, whose interrupt output
   signal is fed into the PMC. This signal is optionally inverted, and then
@@ -12,8 +18,29 @@ Properties:
 
 Example:
 
+/ SoC dts including file
 pmc@7000f400 {
        compatible = "nvidia,tegra20-pmc";
        reg = <0x7000e400 0x400>;
+       clocks = <&tegra_car 110>, <&clk32k_in>;
+       clock-names = "pclk", "clk32k_in";
        nvidia,invert-interrupt;
 };
+
+/ Tegra board dts file
+{
+       ...
+       clocks {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               clk32k_in: clock {
+                       compatible = "fixed-clock";
+                       reg=<0>;
+                       #clock-cells = <0>;
+                       clock-frequency = <32768>;
+               };
+       };
+       ...
+};

diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts b/arch/arm/boot/dts/tegra114-dalmore.dts
index a30aca62658ad192691dc81800f9a1f27fe6cb1e..6ebc1b704190e63e0ec979117b5de7f5704fbcd9 100644 (file)
--- a/arch/arm/boot/dts/tegra114-dalmore.dts
+++ b/arch/arm/boot/dts/tegra114-dalmore.dts
@@ -18,4 +18,17 @@
        pmc {
                nvidia,invert-interrupt;
        };
+
+       clocks {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               clk32k_in: clock {
+                       compatible = "fixed-clock";
+                       reg=<0>;
+                       #clock-cells = <0>;
+                       clock-frequency = <32768>;
+               };
+       };
 };

diff --git a/arch/arm/boot/dts/tegra114-pluto.dts b/arch/arm/boot/dts/tegra114-pluto.dts
index 9bea8f57aa47f6010441066dee01367df3887153..5deb8692b3504c1aebcb8c35af4faea43060f884 100644 (file)
--- a/arch/arm/boot/dts/tegra114-pluto.dts
+++ b/arch/arm/boot/dts/tegra114-pluto.dts
@@ -18,4 +18,17 @@
        pmc {
                nvidia,invert-interrupt;
        };
+
+       clocks {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               clk32k_in: clock {
+                       compatible = "fixed-clock";
+                       reg=<0>;
+                       #clock-cells = <0>;
+                       clock-frequency = <32768>;
+               };
+       };
 };

diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index e4ddeddcd437459f70faa3787aa28f13b4f926e1..c0b527d15fda10246aebb5f7d5ecce9501bc620b 100644 (file)
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -101,6 +101,8 @@
        pmc {
                compatible = "nvidia,tegra114-pmc";
                reg = <0x7000e400 0x400>;
+               clocks = <&tegra_car 261>, <&clk32k_in>;
+               clock-names = "pclk", "clk32k_in";
        };
 
        iommu {

diff --git a/arch/arm/boot/dts/tegra20-colibri-512.dtsi b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
index cb73e62d61a9726da19083bb89a2fd936ee5eb1d..4e3afdef28a87e4fc9b8fb97a0bc5105a0a53f1f 100644 (file)
--- a/arch/arm/boot/dts/tegra20-colibri-512.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
@@ -447,6 +447,19 @@
                cd-gpios = <&gpio 23 1>; /* gpio PC7 */
        };
 
+       clocks {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               clk32k_in: clock {
+                       compatible = "fixed-clock";
+                       reg=<0>;
+                       #clock-cells = <0>;
+                       clock-frequency = <32768>;
+               };
+       };
+
        sound {
                compatible = "nvidia,tegra-audio-wm9712-colibri_t20",
                                 "nvidia,tegra-audio-wm9712";

diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts
index 1f79c0debb05070cd484d9245002fad6642e536a..ae9d5a20834e542c364bd146474f803148f41d2d 100644 (file)
--- a/arch/arm/boot/dts/tegra20-harmony.dts
+++ b/arch/arm/boot/dts/tegra20-harmony.dts
@@ -451,6 +451,19 @@
                bus-width = <8>;
        };
 
+       clocks {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               clk32k_in: clock {
+                       compatible = "fixed-clock";
+                       reg=<0>;
+                       #clock-cells = <0>;
+                       clock-frequency = <32768>;
+               };
+       };
+
        kbc {
                status = "okay";
                nvidia,debounce-delay-ms = <2>;

diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts
index 9db36da8e0233d8087b97a17041f6e23719e2c03..fd60940e40636949aba4aa23e5ca5acd7efdf7ea 100644 (file)
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -447,6 +447,19 @@
                bus-width = <8>;
        };
 
+       clocks {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               clk32k_in: clock {
+                       compatible = "fixed-clock";
+                       reg=<0>;
+                       #clock-cells = <0>;
+                       clock-frequency = <32768>;
+               };
+       };
+
        gpio-keys {
                compatible = "gpio-keys";
 

diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts
index 715a8b8dd9cdd76cfd0999716af5aab3df149939..4ee700a33ca55e4fbf00c0202cc85217d02ee10f 100644 (file)
--- a/arch/arm/boot/dts/tegra20-seaboard.dts
+++ b/arch/arm/boot/dts/tegra20-seaboard.dts
@@ -595,6 +595,19 @@
                bus-width = <8>;
        };
 
+       clocks {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               clk32k_in: clock {
+                       compatible = "fixed-clock";
+                       reg=<0>;
+                       #clock-cells = <0>;
+                       clock-frequency = <32768>;
+               };
+       };
+
        gpio-keys {
                compatible = "gpio-keys";
 

diff --git a/arch/arm/boot/dts/tegra20-tamonten.dtsi b/arch/arm/boot/dts/tegra20-tamonten.dtsi
index 6e9d91fc6195637f1acfb96e9bb33eecc822b49c..c190257259182b6668c156b46ea8259957435e9b 100644 (file)
--- a/arch/arm/boot/dts/tegra20-tamonten.dtsi
+++ b/arch/arm/boot/dts/tegra20-tamonten.dtsi
@@ -471,6 +471,19 @@
                status = "okay";
        };
 
+       clocks {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               clk32k_in: clock {
+                       compatible = "fixed-clock";
+                       reg=<0>;
+                       #clock-cells = <0>;
+                       clock-frequency = <32768>;
+               };
+       };
+
        regulators {
                compatible = "simple-bus";
 

diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts
index 98f3e44f2a51c945e5839c6b8b4a589066fe38cb..a9f3f06580f5fc9c82a7b5e4c9f281bcbb9b2eb2 100644 (file)
--- a/arch/arm/boot/dts/tegra20-trimslice.dts
+++ b/arch/arm/boot/dts/tegra20-trimslice.dts
@@ -330,6 +330,19 @@
                bus-width = <4>;
        };
 
+       clocks {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               clk32k_in: clock {
+                       compatible = "fixed-clock";
+                       reg=<0>;
+                       #clock-cells = <0>;
+                       clock-frequency = <32768>;
+               };
+       };
+
        poweroff {
                compatible = "gpio-poweroff";
                gpios = <&gpio 191 1>; /* gpio PX7, active low */

diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts
index 4aef56f2d96a0dba2abab5150b11ef464d5f752d..f544806e9618d6aa8cdf70dc4ef59078fc992aa4 100644 (file)
--- a/arch/arm/boot/dts/tegra20-ventana.dts
+++ b/arch/arm/boot/dts/tegra20-ventana.dts
@@ -531,6 +531,19 @@
                bus-width = <8>;
        };
 
+       clocks {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               clk32k_in: clock {
+                       compatible = "fixed-clock";
+                       reg=<0>;
+                       #clock-cells = <0>;
+                       clock-frequency = <32768>;
+               };
+       };
+
        regulators {
                compatible = "simple-bus";
                #address-cells = <1>;

diff --git a/arch/arm/boot/dts/tegra20-whistler.dts b/arch/arm/boot/dts/tegra20-whistler.dts
index 5762188c60ad3b2a708155852bc77eb56b17e287..258cf945f515265b02dafbb419170519259a1bd0 100644 (file)
--- a/arch/arm/boot/dts/tegra20-whistler.dts
+++ b/arch/arm/boot/dts/tegra20-whistler.dts
@@ -520,6 +520,19 @@
                bus-width = <8>;
        };
 
+       clocks {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               clk32k_in: clock {
+                       compatible = "fixed-clock";
+                       reg=<0>;
+                       #clock-cells = <0>;
+                       clock-frequency = <32768>;
+               };
+       };
+
        kbc {
                status = "okay";
                nvidia,debounce-delay-ms = <20>;

diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 37701d8727d81b4571aa0a538c33e20406d3384b..8adaa3576c355163852460d9be0d0f0064aed6bc 100644 (file)
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -417,6 +417,8 @@
        pmc {
                compatible = "nvidia,tegra20-pmc";
                reg = <0x7000e400 0x400>;
+               clocks = <&tegra_car 110>, <&clk32k_in>;
+               clock-names = "pclk", "clk32k_in";
        };
 
        memory-controller@7000f000 {

diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts
index 0a2cd24df853bf2c5982e4f1e465015ad542d13b..6248b2445b32e3df61b0344b3a436f69edef1f62 100644 (file)
--- a/arch/arm/boot/dts/tegra30-beaver.dts
+++ b/arch/arm/boot/dts/tegra30-beaver.dts
@@ -268,6 +268,19 @@
                bus-width = <8>;
        };
 
+       clocks {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               clk32k_in: clock {
+                       compatible = "fixed-clock";
+                       reg=<0>;
+                       #clock-cells = <0>;
+                       clock-frequency = <32768>;
+               };
+       };
+
        regulators {
                compatible = "simple-bus";
                #address-cells = <1>;

diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi
index 3e2d21018a5b18db2108a8ef618d6a0ce5c0494c..65bf2b63174e772c2c8856f91d4fed51b182bdca 100644 (file)
--- a/arch/arm/boot/dts/tegra30-cardhu.dtsi
+++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi
@@ -322,6 +322,19 @@
                bus-width = <8>;
        };
 
+       clocks {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               clk32k_in: clock {
+                       compatible = "fixed-clock";
+                       reg=<0>;
+                       #clock-cells = <0>;
+                       clock-frequency = <32768>;
+               };
+       };
+
        regulators {
                compatible = "simple-bus";
                #address-cells = <1>;

diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index d376959b7731378cb5820a8c1e9cc29620183742..94013404808a4304de7daa345315dfe9da4b9387 100644 (file)
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -426,6 +426,8 @@
        pmc {
                compatible = "nvidia,tegra30-pmc";
                reg = <0x7000e400 0x400>;
+               clocks = <&tegra_car 218>, <&clk32k_in>;
+               clock-names = "pclk", "clk32k_in";
        };
 
        memory-controller {