arm: msm: Use proper irq accessor functions

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

diff --git a/arch/arm/mach-msm/gpio-v2.c b/arch/arm/mach-msm/gpio-v2.c
index 394689a9219825f9640f377bcb15d4c648af6cb0..e00e4dee4274bb0766812130a89e1f14c350cf3e 100644 (file)
--- a/arch/arm/mach-msm/gpio-v2.c
+++ b/arch/arm/mach-msm/gpio-v2.c
@@ -275,14 +275,14 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type)
 
        if (flow_type & IRQ_TYPE_EDGE_BOTH) {
                bits |= BIT(INTR_DECT_CTL);
-               irq_desc[irq].handle_irq = handle_edge_irq;
+               __irq_set_handler_locked(d->irq, handle_edge_irq);
                if ((flow_type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH)
                        __set_bit(gpio, msm_gpio.dual_edge_irqs);
                else
                        __clear_bit(gpio, msm_gpio.dual_edge_irqs);
        } else {
                bits &= ~BIT(INTR_DECT_CTL);
-               irq_desc[irq].handle_irq = handle_level_irq;
+               __irq_set_handler_locked(d->irq, handle_level_irq);
                __clear_bit(gpio, msm_gpio.dual_edge_irqs);
        }
 

diff --git a/arch/arm/mach-msm/gpio.c b/arch/arm/mach-msm/gpio.c
index 176af9dcb8ee4fee77f75cb88b356e40cc277d42..448f2677051b80b6af0330d2314c562b8606d3f5 100644 (file)
--- a/arch/arm/mach-msm/gpio.c
+++ b/arch/arm/mach-msm/gpio.c
@@ -293,10 +293,10 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type)
        val = readl(msm_chip->regs.int_edge);
        if (flow_type & IRQ_TYPE_EDGE_BOTH) {
                writel(val | mask, msm_chip->regs.int_edge);
-               irq_desc[d->irq].handle_irq = handle_edge_irq;
+               __irq_set_handler_locked(d->irq, handle_edge_irq);
        } else {
                writel(val & ~mask, msm_chip->regs.int_edge);
-               irq_desc[d->irq].handle_irq = handle_level_irq;
+               __irq_set_handler_locked(d->irq, handle_level_irq);
        }
        if ((flow_type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
                msm_chip->both_edge_detect |= mask;

diff --git a/arch/arm/mach-msm/irq-vic.c b/arch/arm/mach-msm/irq-vic.c
index 68c28bbdc9695ff77d130765ed163c0a2ad42754..84b8103b46868135a8c09f4bb78f14f550d4b0c5 100644 (file)
--- a/arch/arm/mach-msm/irq-vic.c
+++ b/arch/arm/mach-msm/irq-vic.c
@@ -313,11 +313,11 @@ static int msm_irq_set_type(struct irq_data *d, unsigned int flow_type)
        type = msm_irq_shadow_reg[index].int_type;
        if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
                type |= b;
-               irq_desc[d->irq].handle_irq = handle_edge_irq;
+               __irq_set_handler_locked(d->irq, handle_edge_irq);
        }
        if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) {
                type &= ~b;
-               irq_desc[d->irq].handle_irq = handle_level_irq;
+               __irq_set_handler_locked(d->irq, handle_level_irq);
        }
        writel(type, treg);
        msm_irq_shadow_reg[index].int_type = type;

diff --git a/arch/arm/mach-msm/irq.c b/arch/arm/mach-msm/irq.c
index 0b27d899f40e768f4dd7e6d9794b8e4e094d17ea..8033c6aab974bcc49b226a2b98341626e8be23fc 100644 (file)
--- a/arch/arm/mach-msm/irq.c
+++ b/arch/arm/mach-msm/irq.c
@@ -100,11 +100,11 @@ static int msm_irq_set_type(struct irq_data *d, unsigned int flow_type)
 
        if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
                writel(readl(treg) | b, treg);
-               irq_desc[d->irq].handle_irq = handle_edge_irq;
+               __irq_set_handler_locked(d->irq, handle_edge_irq);
        }
        if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) {
                writel(readl(treg) & (~b), treg);
-               irq_desc[d->irq].handle_irq = handle_level_irq;
+               __irq_set_handler_locked(d->irq, handle_level_irq);
        }
        return 0;
 }

diff --git a/arch/arm/mach-msm/sirc.c b/arch/arm/mach-msm/sirc.c
index 11b54c7aeb09a35749d14994ce237b1e627ec5d3..cfab1c472fbc49888ddb0c943de34d97e6f1fe8e 100644 (file)
--- a/arch/arm/mach-msm/sirc.c
+++ b/arch/arm/mach-msm/sirc.c
@@ -105,10 +105,10 @@ static int sirc_irq_set_type(struct irq_data *d, unsigned int flow_type)
        val = readl(sirc_regs.int_type);
        if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
                val |= mask;
-               irq_desc[d->irq].handle_irq = handle_edge_irq;
+               __irq_set_handler_locked(d->irq, handle_edge_irq);
        } else {
                val &= ~mask;
-               irq_desc[d->irq].handle_irq = handle_level_irq;
+               __irq_set_handler_locked(d->irq, handle_level_irq);
        }
 
        writel(val, sirc_regs.int_type);