ARM: dts: r8a7778: Add SCIF fallback compatibility strings

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
index fc5e7243467abe3cf831130973ae497b665683c3..8ea1792c51460fc4d5c383a4c6b5988f5b52ce6d 100644 (file)
--- a/arch/arm/boot/dts/r8a7778.dtsi
+++ b/arch/arm/boot/dts/r8a7778.dtsi
@@ -297,7 +297,8 @@
        };
 
        scif0: serial@ffe40000 {
-               compatible = "renesas,scif-r8a7778", "renesas,scif";
+               compatible = "renesas,scif-r8a7778", "renesas,rcar-gen1-scif",
+                            "renesas,scif";
                reg = <0xffe40000 0x100>;
                interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp0_clks R8A7778_CLK_SCIF0>;
@@ -307,7 +308,8 @@
        };
 
        scif1: serial@ffe41000 {
-               compatible = "renesas,scif-r8a7778", "renesas,scif";
+               compatible = "renesas,scif-r8a7778", "renesas,rcar-gen1-scif",
+                            "renesas,scif";
                reg = <0xffe41000 0x100>;
                interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp0_clks R8A7778_CLK_SCIF1>;
@@ -317,7 +319,8 @@
        };
 
        scif2: serial@ffe42000 {
-               compatible = "renesas,scif-r8a7778", "renesas,scif";
+               compatible = "renesas,scif-r8a7778", "renesas,rcar-gen1-scif",
+                            "renesas,scif";
                reg = <0xffe42000 0x100>;
                interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp0_clks R8A7778_CLK_SCIF2>;
@@ -327,7 +330,8 @@
        };
 
        scif3: serial@ffe43000 {
-               compatible = "renesas,scif-r8a7778", "renesas,scif";
+               compatible = "renesas,scif-r8a7778", "renesas,rcar-gen1-scif",
+                            "renesas,scif";
                reg = <0xffe43000 0x100>;
                interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp0_clks R8A7778_CLK_SCIF3>;
@@ -337,7 +341,8 @@
        };
 
        scif4: serial@ffe44000 {
-               compatible = "renesas,scif-r8a7778", "renesas,scif";
+               compatible = "renesas,scif-r8a7778", "renesas,rcar-gen1-scif",
+                            "renesas,scif";
                reg = <0xffe44000 0x100>;
                interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp0_clks R8A7778_CLK_SCIF4>;
@@ -347,7 +352,8 @@
        };
 
        scif5: serial@ffe45000 {
-               compatible = "renesas,scif-r8a7778", "renesas,scif";
+               compatible = "renesas,scif-r8a7778", "renesas,rcar-gen1-scif",
+                            "renesas,scif";
                reg = <0xffe45000 0x100>;
                interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp0_clks R8A7778_CLK_SCIF5>;