Some boards use another WDOG reset source to reboot system in ldo-bypass mode.
We need add the property in board dts file so that we can easily know the
WDOG reset source currently.
For Sabresd, WDOG1 for ldo-enable mode(WDOG event), WDOG2 for ldo-bypass mode
(reset external pmic to trigger POR event).
For sl-evk board, there is no WDOG pin connected with external pmic as Sabresd
, because mx6sl boot at 400Mhz. Then both ldo-enable and ldo-bypass mode use
the common WDOG1 as reset source.
Signed-off-by: Robin Gong <b38343@freescale.com>
(cherry picked from commit
d960bbe78009d306f80957321622aaad0628ac4b)
&gpc {
/* use ldo-enable, u-boot will check it and configure */
fsl,ldo-bypass = <0>;
+ /* watchdog select of reset source */
+ fsl,wdog-reset = <1>;
};
&gpc {
/* use ldo-enable, u-boot will check it and configure */
fsl,ldo-bypass = <0>;
+ /* watchdog select of reset source */
+ fsl,wdog-reset = <1>;
};
MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x80000000
MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x80000000
MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000
+ MX6QDL_PAD_GPIO_1__WDOG2_B 0x80000000
>;
};
&gpc {
/* use ldo-bypass, u-boot will check it and configure */
fsl,ldo-bypass = <1>;
+ fsl,wdog-reset = <2>;
};
&hdmi_audio {
&gpc {
/* use ldo-bypass, u-boot will check it and configure */
fsl,ldo-bypass = <1>;
+ /* watchdog select of reset source */
+ fsl,wdog-reset = <1>;
};
&i2c1 {