]> git.karo-electronics.de Git - karo-tx-linux.git/commitdiff
ENGR00279402-1 ARM: dts: imx6: add wdog reset source seclect in dts
authorRobin Gong <b38343@freescale.com>
Thu, 12 Sep 2013 08:22:26 +0000 (16:22 +0800)
committerNitin Garg <nitin.garg@freescale.com>
Fri, 16 Jan 2015 03:17:53 +0000 (21:17 -0600)
Some boards use another WDOG reset source to reboot system in ldo-bypass mode.
We need add the property in board dts file so that we can easily know the
WDOG reset source currently.

For Sabresd, WDOG1 for ldo-enable mode(WDOG event), WDOG2 for ldo-bypass mode
(reset external pmic to trigger POR event).
For sl-evk board, there is no WDOG pin connected with external pmic as Sabresd
, because mx6sl boot at 400Mhz. Then both ldo-enable and ldo-bypass mode use
the common WDOG1 as reset source.

Signed-off-by: Robin Gong <b38343@freescale.com>
(cherry picked from commit d960bbe78009d306f80957321622aaad0628ac4b)

arch/arm/boot/dts/imx6dl-sabresd-ldo.dts
arch/arm/boot/dts/imx6q-sabresd-ldo.dts
arch/arm/boot/dts/imx6qdl-sabresd.dtsi
arch/arm/boot/dts/imx6sl-evk.dts

index b24f2fea4fe3d4a60c53f779325f04d8b0a8bdfd..ab63b2751acc3182307f15e8adaec239b78b08a2 100644 (file)
@@ -16,4 +16,6 @@
 &gpc {
        /* use ldo-enable, u-boot will check it and configure */
        fsl,ldo-bypass = <0>;
+       /* watchdog select of reset source */
+       fsl,wdog-reset = <1>;
 };
index 99ea580afcccbe20740a94e6a862d7af6aa7eee6..1d3b754439106bd18998611c3e02bd5344d8d127 100644 (file)
@@ -16,4 +16,6 @@
 &gpc {
        /* use ldo-enable, u-boot will check it and configure */
        fsl,ldo-bypass = <0>;
+       /* watchdog select of reset source */
+       fsl,wdog-reset = <1>;
 };
index a21db981a46ad32059dc41ca4b5bd69f08e42efd..0ac6af0deb525a60b775968f7c4dd0078432f917 100644 (file)
                                MX6QDL_PAD_SD3_RST__GPIO7_IO08  0x80000000
                                MX6QDL_PAD_GPIO_9__GPIO1_IO09   0x80000000
                                MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000
+                               MX6QDL_PAD_GPIO_1__WDOG2_B 0x80000000
                        >;
                };
 
 &gpc {
        /* use ldo-bypass, u-boot will check it and configure */
        fsl,ldo-bypass = <1>;
+       fsl,wdog-reset = <2>;
 };
 
 &hdmi_audio {
index bc4f5abcac20e4f92fd093eeb3a3f08b7cb17a38..302b9d2fe4e28460bce4e96d6e45685b98c18b15 100644 (file)
 &gpc {
        /* use ldo-bypass, u-boot will check it and configure */
        fsl,ldo-bypass = <1>;
+       /* watchdog select of reset source */
+       fsl,wdog-reset = <1>;
 };
 
 &i2c1 {