]> git.karo-electronics.de Git - karo-tx-uboot.git/commitdiff
exynos: move tzpc_init to armv7/exynos
authorInderpal Singh <inderpal.singh@linaro.org>
Thu, 4 Apr 2013 23:09:19 +0000 (23:09 +0000)
committerMinkyu Kang <mk7.kang@samsung.com>
Tue, 4 Jun 2013 06:22:10 +0000 (15:22 +0900)
tzpc_init is common for all exynos5 boards, hence move it to
armv7/exynos so that all other boards can use it.

Also update the smdk5250 Makefile and config file.

Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org>
Acked-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
arch/arm/cpu/armv7/exynos/Makefile
arch/arm/cpu/armv7/exynos/tzpc.c [moved from board/samsung/smdk5250/tzpc_init.c with 98% similarity]
arch/arm/include/asm/arch-exynos/tzpc.h
board/samsung/smdk5250/Makefile
board/samsung/smdk5250/setup.h
include/configs/exynos5250-dt.h

index 9119961d95dfeab2e0415059b24c7792542e7656..b2f9152e1bf71ccc1f132300645ae344c46c2213 100644 (file)
@@ -22,7 +22,7 @@ include $(TOPDIR)/config.mk
 
 LIB    = $(obj)lib$(SOC).o
 
-COBJS  += clock.o power.o soc.o system.o pinmux.o
+COBJS  += clock.o power.o soc.o system.o pinmux.o tzpc.o
 
 SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS   := $(addprefix $(obj),$(COBJS) $(SOBJS))
similarity index 98%
rename from board/samsung/smdk5250/tzpc_init.c
rename to arch/arm/cpu/armv7/exynos/tzpc.c
index c833541fd03e39a969c01dda9433effcba83b498..81adb4b57fb751a10ec0a07317d4e77ebcd28840 100644 (file)
@@ -23,7 +23,7 @@
  */
 
 #include <asm/arch/tzpc.h>
-#include"setup.h"
+#include <asm/io.h>
 
 /* Setting TZPC[TrustZone Protection Controller] */
 void tzpc_init(void)
index c5eb4b1cc2bcda1e8c9b9e18a953b0db27aff411..050ad704ce057e5e77f11050618122c056e2229d 100644 (file)
@@ -47,6 +47,34 @@ struct exynos_tzpc {
        unsigned int pcellid2;
        unsigned int pcellid3;
 };
+
+/* TZPC : Register Offsets */
+#define TZPC0_BASE             0x10100000
+#define TZPC1_BASE             0x10110000
+#define TZPC2_BASE             0x10120000
+#define TZPC3_BASE             0x10130000
+#define TZPC4_BASE             0x10140000
+#define TZPC5_BASE             0x10150000
+#define TZPC6_BASE             0x10160000
+#define TZPC7_BASE             0x10170000
+#define TZPC8_BASE             0x10180000
+#define TZPC9_BASE             0x10190000
+
+#define TZPC_BASE_OFFSET               0x10000
+
+/*
+ * TZPC Register Value :
+ * R0SIZE: 0x0 : Size of secured ram
+ */
+#define R0SIZE                 0x0
+
+/*
+ * TZPC Decode Protection Register Value :
+ * DECPROTXSET: 0xFF : Set Decode region to non-secure
+ */
+#define DECPROTXSET            0xFF
+void tzpc_init(void);
+
 #endif
 
 #endif
index 47c6a5a46b51b805bddedd5f06ff9de33bd61e47..d079f4ce784aa9bd8aaa4212bfb7897691f6c0b7 100644 (file)
@@ -28,7 +28,6 @@ SOBJS := lowlevel_init.o
 
 COBJS  := clock_init.o
 COBJS  += dmc_common.o dmc_init_ddr3.o
-COBJS  += tzpc_init.o
 COBJS  += smdk5250_spl.o
 
 ifndef CONFIG_SPL_BUILD
index 34d8bc31f4dea5503fd596dc433f598a87e24521..eb91d131092526a7af038ee29611775b9f8b39ab 100644 (file)
 #include <config.h>
 #include <asm/arch/dmc.h>
 
-/* TZPC : Register Offsets */
-#define TZPC0_BASE             0x10100000
-#define TZPC1_BASE             0x10110000
-#define TZPC2_BASE             0x10120000
-#define TZPC3_BASE             0x10130000
-#define TZPC4_BASE             0x10140000
-#define TZPC5_BASE             0x10150000
-#define TZPC6_BASE             0x10160000
-#define TZPC7_BASE             0x10170000
-#define TZPC8_BASE             0x10180000
-#define TZPC9_BASE             0x10190000
-
 /* APLL_CON1   */
 #define APLL_CON1_VAL  (0x00203800)
 
 /* CLK_GATE_IP_DISP1 */
 #define CLK_GATE_DP1_ALLOW     (1 << 4)
 
-/*
- * TZPC Register Value :
- * R0SIZE: 0x0 : Size of secured ram
- */
-#define R0SIZE                 0x0
-
-/*
- * TZPC Decode Protection Register Value :
- * DECPROTXSET: 0xFF : Set Decode region to non-secure
- */
-#define DECPROTXSET            0xFF
-
 #define DDR3PHY_CTRL_PHY_RESET (1 << 0)
 #define DDR3PHY_CTRL_PHY_RESET_OFF     (0 << 0)
 
@@ -590,5 +566,4 @@ void update_reset_dll(struct exynos5_dmc *, enum ddr_mode);
 void sdelay(unsigned long);
 void mem_ctrl_init(void);
 void system_clock_init(void);
-void tzpc_init(void);
 #endif
index f7f4bf2b95ef5eba7fb6616299034a693fe64dad..62b83d4c5498d977114baea4715a0baee15ebdd6 100644 (file)
@@ -93,8 +93,6 @@
 #define CONFIG_EXTRA_ENV_SETTINGS \
        EXYNOS_DEVICE_SETTINGS
 
-#define TZPC_BASE_OFFSET               0x10000
-
 /* SD/MMC configuration */
 #define CONFIG_GENERIC_MMC
 #define CONFIG_MMC