staging: comedi: ni_stc.h: tidy up AO_Mode_3_Register and bits

Rename the CamelCase. Use the BIT() macro to define the bits.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/staging/comedi/drivers/ni_mio_common.c b/drivers/staging/comedi/drivers/ni_mio_common.c
index 2c85b5715b05215cc5c6ac677577b8fc4d3630fd..a417ab405a3dbb949fcc45fa72967191053b03b7 100644 (file)
--- a/drivers/staging/comedi/drivers/ni_mio_common.c
+++ b/drivers/staging/comedi/drivers/ni_mio_common.c
@@ -364,7 +364,7 @@ static const struct mio_regmap m_series_stc_write_regmap[] = {
        [NISTC_AO_TRIG_SEL_REG]         = { 0x186, 2 },
        [NISTC_G0_AUTOINC_REG]          = { 0x188, 2 },
        [NISTC_G1_AUTOINC_REG]          = { 0x18a, 2 },
-       [AO_Mode_3_Register]            = { 0x18c, 2 },
+       [NISTC_AO_MODE3_REG]            = { 0x18c, 2 },
        [Joint_Reset_Register]          = { 0x190, 2 },
        [Interrupt_A_Enable_Register]   = { 0x192, 2 },
        [Second_IRQ_A_Enable_Register]  = { 0, 0 }, /* E-Series only */
@@ -2857,9 +2857,9 @@ static int ni_ao_inttrig(struct comedi_device *dev,
        interrupt_b_bits |= AO_FIFO_Interrupt_Enable;
 #endif
 
-       ni_stc_writew(dev, devpriv->ao_mode3 | AO_Not_An_UPDATE,
-                     AO_Mode_3_Register);
-       ni_stc_writew(dev, devpriv->ao_mode3, AO_Mode_3_Register);
+       ni_stc_writew(dev, devpriv->ao_mode3 | NISTC_AO_MODE3_NOT_AN_UPDATE,
+                     NISTC_AO_MODE3_REG);
+       ni_stc_writew(dev, devpriv->ao_mode3, NISTC_AO_MODE3_REG);
        /* wait for DACs to be loaded */
        for (i = 0; i < timeout; i++) {
                udelay(1);
@@ -2967,8 +2967,8 @@ static int ni_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
        devpriv->ao_trigger_select = val;
        ni_stc_writew(dev, devpriv->ao_trigger_select, NISTC_AO_TRIG_SEL_REG);
 
-       devpriv->ao_mode3 &= ~AO_Trigger_Length;
-       ni_stc_writew(dev, devpriv->ao_mode3, AO_Mode_3_Register);
+       devpriv->ao_mode3 &= ~NISTC_AO_MODE3_TRIG_LEN;
+       ni_stc_writew(dev, devpriv->ao_mode3, NISTC_AO_MODE3_REG);
 
        ni_stc_writew(dev, devpriv->ao_mode1, NISTC_AO_MODE1_REG);
        devpriv->ao_mode2 &= ~NISTC_AO_MODE2_BC_INIT_LOAD_SRC;
@@ -3064,8 +3064,8 @@ static int ni_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
                           NISTC_AO_CMD1_DAC0_UPDATE_MODE,
                      NISTC_AO_CMD1_REG);
 
-       devpriv->ao_mode3 |= AO_Stop_On_Overrun_Error;
-       ni_stc_writew(dev, devpriv->ao_mode3, AO_Mode_3_Register);
+       devpriv->ao_mode3 |= NISTC_AO_MODE3_STOP_ON_OVERRUN_ERR;
+       ni_stc_writew(dev, devpriv->ao_mode3, NISTC_AO_MODE3_REG);
 
        devpriv->ao_mode2 &= ~NISTC_AO_MODE2_FIFO_MODE_MASK;
 #ifdef PCIDMA
@@ -3213,10 +3213,10 @@ static int ni_ao_reset(struct comedi_device *dev, struct comedi_subdevice *s)
        devpriv->ao_mode2 = 0;
        ni_stc_writew(dev, devpriv->ao_mode2, NISTC_AO_MODE2_REG);
        if (devpriv->is_m_series)
-               devpriv->ao_mode3 = AO_Last_Gate_Disable;
+               devpriv->ao_mode3 = NISTC_AO_MODE3_LAST_GATE_DISABLE;
        else
                devpriv->ao_mode3 = 0;
-       ni_stc_writew(dev, devpriv->ao_mode3, AO_Mode_3_Register);
+       ni_stc_writew(dev, devpriv->ao_mode3, NISTC_AO_MODE3_REG);
        devpriv->ao_trigger_select = 0;
        ni_stc_writew(dev, devpriv->ao_trigger_select,
                      NISTC_AO_TRIG_SEL_REG);

diff --git a/drivers/staging/comedi/drivers/ni_stc.h b/drivers/staging/comedi/drivers/ni_stc.h
index f63f290c4cb16660e0f3a842a089b08338ce4219..69bfdc0069446151d61275838796823b955ad862 100644 (file)
--- a/drivers/staging/comedi/drivers/ni_stc.h
+++ b/drivers/staging/comedi/drivers/ni_stc.h
@@ -362,6 +362,17 @@
 #define NISTC_G0_AUTOINC_REG           68
 #define NISTC_G1_AUTOINC_REG           69
 
+#define NISTC_AO_MODE3_REG             70
+#define NISTC_AO_MODE3_UI2_SW_NEXT_TC          BIT(13)
+#define NISTC_AO_MODE3_UC_SW_EVERY_BC_TC       BIT(12)
+#define NISTC_AO_MODE3_TRIG_LEN                        BIT(11)
+#define NISTC_AO_MODE3_STOP_ON_OVERRUN_ERR     BIT(5)
+#define NISTC_AO_MODE3_STOP_ON_BC_TC_TRIG_ERR  BIT(4)
+#define NISTC_AO_MODE3_STOP_ON_BC_TC_ERR       BIT(3)
+#define NISTC_AO_MODE3_NOT_AN_UPDATE           BIT(2)
+#define NISTC_AO_MODE3_SW_GATE                 BIT(1)
+#define NISTC_AO_MODE3_LAST_GATE_DISABLE       BIT(0)  /* M-Series only */
+
 #define AI_Status_1_Register           2
 #define Interrupt_A_St                         0x8000
 #define AI_FIFO_Full_St                                0x4000
@@ -420,17 +431,6 @@ enum Joint_Status_2_Bits {
 #define AO_BC_Save_Registers           18
 #define AO_UC_Save_Registers           20
 
-#define AO_Mode_3_Register             70
-#define AO_UI2_Switch_Load_Next_TC             _bit13
-#define AO_UC_Switch_Load_Every_BC_TC          _bit12
-#define AO_Trigger_Length                      _bit11
-#define AO_Stop_On_Overrun_Error               _bit5
-#define AO_Stop_On_BC_TC_Trigger_Error         _bit4
-#define AO_Stop_On_BC_TC_Error                 _bit3
-#define AO_Not_An_UPDATE                       _bit2
-#define AO_Software_Gate                       _bit1
-#define AO_Last_Gate_Disable           _bit0   /* M Series only */
-
 #define Joint_Reset_Register           72
 #define Software_Reset                 _bit11
 #define AO_Configuration_End                   _bit9