i2c-algo-bit: Fix timeout test

commit 0cdba07bb23cdd3e0d64357ec3d983e6b75e541f upstream

When fetching DDC using i2c algo bit, we were often seeing timeouts
before getting valid EDID on a retry. The VESA spec states 2ms is the
DDC timeout, so when this translates into 1 jiffie and we are close
to the end of the time period, it could return with a timeout less than
2ms.

Change this code to use time_after instead of time_after_eq.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

diff --git a/drivers/i2c/algos/i2c-algo-bit.c b/drivers/i2c/algos/i2c-algo-bit.c
index eb8f72ca02f45cfe954da3a1240e5a18fdd5d2bd..0e034a41ce9b9c3f1aa13dd3d3afe82a51e190c9 100644 (file)
--- a/drivers/i2c/algos/i2c-algo-bit.c
+++ b/drivers/i2c/algos/i2c-algo-bit.c
@@ -104,7 +104,7 @@ static int sclhi(struct i2c_algo_bit_data *adap)
                 * chips may hold it low ("clock stretching") while they
                 * are processing data internally.
                 */
-               if (time_after_eq(jiffies, start + adap->timeout))
+               if (time_after(jiffies, start + adap->timeout))
                        return -ETIMEDOUT;
                cond_resched();
        }