Current implementation set max98095->sysclk/max98088->sysclk to freq twice.
Set it once is enough, this patch removes the first assignment in case
we may set invalid clock frequency to max98095->sysclk/max98088->sysclk.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Acked-by: Peter Hsiang <peter.hsiang@maxim-ic.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
if (freq == max98088->sysclk)
return 0;
- max98088->sysclk = freq; /* remember current sysclk */
-
/* Setup clocks for slave mode, and using the PLL
* PSCLK = 0x01 (when master clk is 10MHz to 20MHz)
* 0x02 (when master clk is 20MHz to 30MHz)..
if (freq == max98095->sysclk)
return 0;
- max98095->sysclk = freq; /* remember current sysclk */
-
/* Setup clocks for slave mode, and using the PLL
* PSCLK = 0x01 (when master clk is 10MHz to 20MHz)
* 0x02 (when master clk is 20MHz to 40MHz)..