When the ipu pixel clocks are initialized, the default pixel clock rate
will be calucated according to the present ipu register setting which
is likely set by a bootloader.
But these registers will be reset by the ipu reset function.
If the default pixel clock rate is the same to what is requested later,
the clk_set_rate function will treat this case as pixel clock unchanged.
Move the pixel clock setup function after the ipu reset function to
resolve this issue
Signed-off-by: Sandor Yu <R01008@freescale.com>
}
ipu->online = true;
- ret = ipu_clk_setup_enable(ipu, pltfm_data);
- if (ret < 0) {
- dev_err(ipu->dev, "ipu clk setup failed\n");
- ipu->online = false;
- return ret;
- }
platform_set_drvdata(pdev, ipu);
IPU_DISP_GEN);
}
+ /* setup ipu clk tree after ipu reset */
+ ret = ipu_clk_setup_enable(ipu, pltfm_data);
+ if (ret < 0) {
+ dev_err(ipu->dev, "ipu clk setup failed\n");
+ ipu->online = false;
+ return ret;
+ }
+
/* Set sync refresh channels and CSI->mem channel as high priority */
ipu_idmac_write(ipu, 0x18800001L, IDMAC_CHA_PRI(0));