cxgb4: update struct cxgb4_lld_info definition

add members for iSCSI DDP.

Signed-off-by: Varun Prakash <varun@chelsio.com>
Acked-by: Hariprasad Shenai <hariprasad@chelsio.com>
Signed-off-by: Nicholas Bellinger <nab@linux-iscsi.org>

diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h b/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h
index 92086a08e99d3c87d26d81e21bf18a647447ecaa..646076e36bca9083e1080d7a82cb3ffc25f8f9f1 100644 (file)
--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h
+++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h
@@ -759,6 +759,8 @@ struct adapter {
        struct list_head list_node;
        struct list_head rcu_node;
 
+       void *iscsi_ppm;
+
        struct tid_info tids;
        void **tid_release_head;
        spinlock_t tid_release_lock;

diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
index 050f21540d8299b4903921cf7b1d77a64a1ebccc..1a1f1c89660bc358bc39e716e6541a6ca4bdb10e 100644 (file)
--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
@@ -2457,6 +2457,10 @@ static void uld_attach(struct adapter *adap, unsigned int uld)
        lli.wr_cred = adap->params.ofldq_wr_cred;
        lli.adapter_type = adap->params.chip;
        lli.iscsi_iolen = MAXRXDATA_G(t4_read_reg(adap, TP_PARA_REG2_A));
+       lli.iscsi_tagmask = t4_read_reg(adap, ULP_RX_ISCSI_TAGMASK_A);
+       lli.iscsi_pgsz_order = t4_read_reg(adap, ULP_RX_ISCSI_PSZ_A);
+       lli.iscsi_llimit = t4_read_reg(adap, ULP_RX_ISCSI_LLIMIT_A);
+       lli.iscsi_ppm = &adap->iscsi_ppm;
        lli.cclk_ps = 1000000000 / adap->params.vpd.cclk;
        lli.udb_density = 1 << adap->params.sge.eq_qpp;
        lli.ucq_density = 1 << adap->params.sge.iq_qpp;

diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h
index d97a81f0a1342b4a51e19de85bb84628b59fb6b6..f3c58aaa932dd6c8435d3ed04b208eb64f5d8237 100644 (file)
--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h
+++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h
@@ -275,6 +275,10 @@ struct cxgb4_lld_info {
        unsigned int max_ordird_qp;          /* Max ORD/IRD depth per RDMA QP */
        unsigned int max_ird_adapter;        /* Max IRD memory per adapter */
        bool ulptx_memwrite_dsgl;            /* use of T5 DSGL allowed */
+       unsigned int iscsi_tagmask;          /* iscsi ddp tag mask */
+       unsigned int iscsi_pgsz_order;       /* iscsi ddp page size orders */
+       unsigned int iscsi_llimit;           /* chip's iscsi region llimit */
+       void **iscsi_ppm;                    /* iscsi page pod manager */
        int nodeid;                          /* device numa node id */
 };