int (*reg_read)(void *context, unsigned int reg, unsigned int *val);
int (*reg_write)(void *context, unsigned int reg, unsigned int val);
+ int (*reg_update_bits)(void *context, unsigned int reg,
+ unsigned int mask, unsigned int val,
+ bool *change, bool force_write);
bool defer_caching;
goto skip_format_initialization;
} else {
map->reg_read = _regmap_bus_read;
+ map->reg_update_bits = bus->reg_update_bits;
}
reg_endian = regmap_get_reg_endian(bus, config);
int ret;
unsigned int tmp, orig;
+ if (map->reg_update_bits) {
+ ret = map->reg_update_bits(map->bus_context, reg, mask, val,
+ change, force_write);
+ if (ret != 0)
+ return ret;
+
+ /* Fix up the cache by read/modify/write */
+ if (!map->cache_bypass && !map->defer_caching) {
+ ret = regcache_read(map, reg, &orig);
+ if (ret != 0)
+ return ret;
+
+ tmp = orig & ~mask;
+ tmp |= val & mask;
+
+ ret = regcache_write(map, reg, tmp);
+ if (ret != 0)
+ return ret;
+ if (map->cache_only)
+ map->cache_dirty = true;
+ }
+ return ret;
+ }
+
ret = _regmap_read(map, reg, &orig);
if (ret != 0)
return ret;
unsigned int *val);
typedef int (*regmap_hw_reg_write)(void *context, unsigned int reg,
unsigned int val);
+typedef int (*regmap_hw_reg_update_bits)(void *context, unsigned int reg,
+ unsigned int mask, unsigned int val,
+ bool *change, bool force_write);
typedef struct regmap_async *(*regmap_hw_async_alloc)(void);
typedef void (*regmap_hw_free_context)(void *context);
regmap_hw_gather_write gather_write;
regmap_hw_async_write async_write;
regmap_hw_reg_write reg_write;
+ regmap_hw_reg_update_bits reg_update_bits;
regmap_hw_read read;
regmap_hw_reg_read reg_read;
regmap_hw_free_context free_context;