ARM: sun5i: chip: Add optional buses

The I2C1 and SPI2 buses are exposed on the CHIP headers, and are not
explicitly dedicated to anything.

Add them to the DTS with the muxing already set, but keep them disabled.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>

diff --git a/arch/arm/boot/dts/sun5i-r8-chip.dts b/arch/arm/boot/dts/sun5i-r8-chip.dts
index 059d86865b73383ee8cd468f0f2ac4105c4766e0..c6da5ad3715281c7a1f56bc5c2c5b2e2e86667e5 100644 (file)
--- a/arch/arm/boot/dts/sun5i-r8-chip.dts
+++ b/arch/arm/boot/dts/sun5i-r8-chip.dts
@@ -56,9 +56,11 @@
 
        aliases {
                i2c0 = &i2c0;
+               i2c1 = &i2c1;
                i2c2 = &i2c2;
                serial0 = &uart1;
                serial1 = &uart3;
+               spi0 = &spi2;
        };
 
        chosen {
@@ -126,6 +128,12 @@
 
 #include "axp209.dtsi"
 
+&i2c1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&i2c1_pins_a>;
+       status = "disabled";
+};
+
 &i2c2 {
        pinctrl-names = "default";
        pinctrl-0 = <&i2c2_pins_a>;
@@ -257,6 +265,12 @@
        status = "okay";
 };
 
+&spi2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&spi2_pins_a>;
+       status = "disabled";
+};
+
 &tcon0 {
        status = "okay";
 };