Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx

* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx:
  ppc440spe-adma: adds updated ppc440spe adma driver
  iop-adma.c: use resource_size()
  dmaengine: clarify the meaning of the DMA_CTRL_ACK flag
  sh: stylistic improvements for the DMA driver
  dmaengine: fix dmatest to verify minimum transfer length and test buffer size
  sh: DMA driver has to specify its alignment requirements
  Add COH 901 318 DMA block driver v5

diff --combined drivers/dma/Kconfig
index eb140ff38c27e5be88932c068efe032221c1f69a,fe93d70f2e377467cd12147ed71f8c55685ba28f..e02d74b1e8922ae44a3817699937b6a08090e038
--- 1/drivers/dma/Kconfig
--- 2/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@@ -26,8 -26,6 +26,8 @@@ config INTEL_IOATDM
        select DMA_ENGINE
        select DCA
        select ASYNC_TX_DISABLE_CHANNEL_SWITCH
 +      select ASYNC_TX_DISABLE_PQ_VAL_DMA
 +      select ASYNC_TX_DISABLE_XOR_VAL_DMA
        help
          Enable support for the Intel(R) I/OAT DMA engine present
          in recent Intel Xeon chipsets.
@@@ -54,7 -52,7 +54,7 @@@ config DW_DMA
  
  config AT_HDMAC
        tristate "Atmel AHB DMA support"
 -      depends on ARCH_AT91SAM9RL
 +      depends on ARCH_AT91SAM9RL || ARCH_AT91SAM9G45
        select DMA_ENGINE
        help
          Support the Atmel AHB DMA controller.  This can be integrated in
@@@ -111,6 -109,24 +111,24 @@@ config SH_DMA
        help
          Enable support for the Renesas SuperH DMA controllers.
  
+ config COH901318
+       bool "ST-Ericsson COH901318 DMA support"
+       select DMA_ENGINE
+       depends on ARCH_U300
+       help
+         Enable support for ST-Ericsson COH 901 318 DMA.
+ 
+ config AMCC_PPC440SPE_ADMA
+       tristate "AMCC PPC440SPe ADMA support"
+       depends on 440SPe || 440SP
+       select DMA_ENGINE
+       select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
+       help
+         Enable support for the AMCC PPC440SPe RAID engines.
+ 
+ config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
+       bool
+ 
  config DMA_ENGINE
        bool
  

diff --combined drivers/dma/shdma.c
index 034ecf0ace03751b5fb20b282328e8a4d70005fe,8d9acd751ed6035c71faf0dee209544144027371..2e4a54c8afeb842d63deceee9fa5d50030aa713e
--- 1/drivers/dma/shdma.c
--- 2/drivers/dma/shdma.c
+++ b/drivers/dma/shdma.c
@@@ -80,17 -80,17 +80,17 @@@ static int sh_dmae_rst(int id
        unsigned short dmaor;
  
        sh_dmae_ctl_stop(id);
-       dmaor = (dmaor_read_reg(id)|DMAOR_INIT);
+       dmaor = dmaor_read_reg(id) | DMAOR_INIT;
  
        dmaor_write_reg(id, dmaor);
-       if ((dmaor_read_reg(id) & (DMAOR_AE | DMAOR_NMIF))) {
+       if (dmaor_read_reg(id) & (DMAOR_AE | DMAOR_NMIF)) {
                pr_warning(KERN_ERR "dma-sh: Can't initialize DMAOR.\n");
                return -EINVAL;
        }
        return 0;
  }
  
- static int dmae_is_idle(struct sh_dmae_chan *sh_chan)
+ static int dmae_is_busy(struct sh_dmae_chan *sh_chan)
  {
        u32 chcr = sh_dmae_readl(sh_chan, CHCR);
        if (chcr & CHCR_DE) {
@@@ -110,15 -110,14 +110,14 @@@ static void dmae_set_reg(struct sh_dmae
  {
        sh_dmae_writel(sh_chan, hw.sar, SAR);
        sh_dmae_writel(sh_chan, hw.dar, DAR);
-       sh_dmae_writel(sh_chan,
-               (hw.tcr >> calc_xmit_shift(sh_chan)), TCR);
+       sh_dmae_writel(sh_chan, hw.tcr >> calc_xmit_shift(sh_chan), TCR);
  }
  
  static void dmae_start(struct sh_dmae_chan *sh_chan)
  {
        u32 chcr = sh_dmae_readl(sh_chan, CHCR);
  
-       chcr |= (CHCR_DE|CHCR_IE);
+       chcr |= CHCR_DE | CHCR_IE;
        sh_dmae_writel(sh_chan, chcr, CHCR);
  }
  
@@@ -132,7 -131,7 +131,7 @@@ static void dmae_halt(struct sh_dmae_ch
  
  static int dmae_set_chcr(struct sh_dmae_chan *sh_chan, u32 val)
  {
-       int ret = dmae_is_idle(sh_chan);
+       int ret = dmae_is_busy(sh_chan);
        /* When DMA was working, can not set data to CHCR */
        if (ret)
                return ret;
@@@ -149,7 -148,7 +148,7 @@@ static int dmae_set_dmars(struct sh_dma
  {
        u32 addr;
        int shift = 0;
-       int ret = dmae_is_idle(sh_chan);
+       int ret = dmae_is_busy(sh_chan);
        if (ret)
                return ret;
  
@@@ -307,7 -306,7 +306,7 @@@ static struct dma_async_tx_descriptor *
                new = sh_dmae_get_desc(sh_chan);
                if (!new) {
                        dev_err(sh_chan->dev,
-                                       "No free memory for link descriptor\n");
+                               "No free memory for link descriptor\n");
                        goto err_get_desc;
                }
  
@@@ -388,7 -387,7 +387,7 @@@ static void sh_chan_xfer_ld_queue(struc
        struct sh_dmae_regs hw;
  
        /* DMA work check */
-       if (dmae_is_idle(sh_chan))
+       if (dmae_is_busy(sh_chan))
                return;
  
        /* Find the first un-transfer desciptor */
@@@ -497,8 -496,9 +496,9 @@@ static void dmae_do_tasklet(unsigned lo
        struct sh_dmae_chan *sh_chan = (struct sh_dmae_chan *)data;
        struct sh_desc *desc, *_desc, *cur_desc = NULL;
        u32 sar_buf = sh_dmae_readl(sh_chan, SAR);
+ 
        list_for_each_entry_safe(desc, _desc,
-                                       &sh_chan->ld_queue, node) {
+                                &sh_chan->ld_queue, node) {
                if ((desc->hw.sar + desc->hw.tcr) == sar_buf) {
                        cur_desc = desc;
                        break;
@@@ -543,8 -543,8 +543,8 @@@ static int __devinit sh_dmae_chan_probe
        /* alloc channel */
        new_sh_chan = kzalloc(sizeof(struct sh_dmae_chan), GFP_KERNEL);
        if (!new_sh_chan) {
-               dev_err(shdev->common.dev, "No free memory for allocating "
-                               "dma channels!\n");
+               dev_err(shdev->common.dev,
+                       "No free memory for allocating dma channels!\n");
                return -ENOMEM;
        }
  
@@@ -586,8 -586,8 +586,8 @@@
                        "sh-dmae%d", new_sh_chan->id);
  
        /* set up channel irq */
-       err = request_irq(irq, &sh_dmae_interrupt,
-               irqflags, new_sh_chan->dev_id, new_sh_chan);
+       err = request_irq(irq, &sh_dmae_interrupt, irqflags,
+                         new_sh_chan->dev_id, new_sh_chan);
        if (err) {
                dev_err(shdev->common.dev, "DMA channel %d request_irq error "
                        "with return %d\n", id, err);
@@@ -640,16 -640,17 +640,16 @@@ static int __init sh_dmae_probe(struct 
  #endif
        struct sh_dmae_device *shdev;
  
 +      /* get platform data */
 +      if (!pdev->dev.platform_data)
 +              return -ENODEV;
 +
        shdev = kzalloc(sizeof(struct sh_dmae_device), GFP_KERNEL);
        if (!shdev) {
                dev_err(&pdev->dev, "No enough memory\n");
 -              err = -ENOMEM;
 -              goto shdev_err;
 +              return -ENOMEM;
        }
  
 -      /* get platform data */
 -      if (!pdev->dev.platform_data)
 -              goto shdev_err;
 -
        /* platform data */
        memcpy(&shdev->pdata, pdev->dev.platform_data,
                        sizeof(struct sh_dmae_pdata));
@@@ -676,6 -677,8 +676,8 @@@
        shdev->common.device_is_tx_complete = sh_dmae_is_complete;
        shdev->common.device_issue_pending = sh_dmae_memcpy_issue_pending;
        shdev->common.dev = &pdev->dev;
+       /* Default transfer size of 32 bytes requires 32-byte alignment */
+       shdev->common.copy_align = 5;
  
  #if defined(CONFIG_CPU_SH4)
        /* Non Mix IRQ mode SH7722/SH7730 etc... */
@@@ -688,8 -691,8 +690,8 @@@
        }
  
        for (ecnt = 0 ; ecnt < ARRAY_SIZE(eirq); ecnt++) {
-               err = request_irq(eirq[ecnt], sh_dmae_err,
-                       irqflags, "DMAC Address Error", shdev);
+               err = request_irq(eirq[ecnt], sh_dmae_err, irqflags,
+                                 "DMAC Address Error", shdev);
                if (err) {
                        dev_err(&pdev->dev, "DMA device request_irq"
                                "error (irq %d) with return %d\n",
@@@ -721,6 -724,7 +723,6 @@@ eirq_err
  rst_err:
        kfree(shdev);
  
 -shdev_err:
        return err;
  }