drm/i915: remove dev_priv->pc8.enabled

It was just being used on debugfs and on a WARN inside
hsw_set_power_well. But now that we PC8 is part of runtime PM and we
get/put runtime PM when we get/put any power domain, we shouldn't need
the WARN anymore.

v2: - Rebase.
v3: - Rebase.

Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 4960bf62961520cd5d23a7e39b0a9331b44cc182..2365bb299276f9afcd2430b8e879b160c67b7f96 100644 (file)
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2016,7 +2016,6 @@ static int i915_pc8_status(struct seq_file *m, void *unused)
        seq_printf(m, "GPU idle: %s\n", yesno(!dev_priv->mm.busy));
        seq_printf(m, "IRQs disabled: %s\n",
                   yesno(dev_priv->pc8.irqs_disabled));
-       seq_printf(m, "Enabled: %s\n", yesno(dev_priv->pc8.enabled));
        mutex_unlock(&dev_priv->pc8.lock);
 
        return 0;

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 41efb09282ae4100e3b4b595803df4b48c2c2c24..02102712465ed2272ce0a1e0d1d15e233cce701b 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1391,8 +1391,6 @@ struct ilk_wm_values {
  */
 struct i915_package_c8 {
        bool irqs_disabled;
-       /* Only true after the delayed work task actually enables it. */
-       bool enabled;
        struct mutex lock;
 
        struct {

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 90d16a1fa6504055ed6b1bd91e676bac87b70745..1553fe7542c74f6b845a7999205ac621b9d8dbc6 100644 (file)
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -7033,8 +7033,6 @@ void __hsw_do_enable_pc8(struct drm_i915_private *dev_priv)
 
        DRM_DEBUG_KMS("Enabling package C8+\n");
 
-       dev_priv->pc8.enabled = true;
-
        if (dev_priv->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) {
                val = I915_READ(SOUTH_DSPCLK_GATE_D);
                val &= ~PCH_LP_PARTITION_LEVEL_DISABLE;
@@ -7070,7 +7068,6 @@ void __hsw_do_disable_pc8(struct drm_i915_private *dev_priv)
        mutex_lock(&dev_priv->rps.hw_lock);
        gen6_update_ring_freq(dev);
        mutex_unlock(&dev_priv->rps.hw_lock);
-       dev_priv->pc8.enabled = false;
 }
 
 static void haswell_modeset_global_resources(struct drm_device *dev)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 012867e85cda6e14fdecf9c11f3fc4a5a9421901..ddd0368460aede1d43f0ae1e57cf5e5dc547b674 100644 (file)
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -5345,8 +5345,6 @@ static void hsw_set_power_well(struct drm_i915_private *dev_priv,
        bool is_enabled, enable_requested;
        uint32_t tmp;
 
-       WARN_ON(dev_priv->pc8.enabled);
-
        tmp = I915_READ(HSW_PWR_WELL_DRIVER);
        is_enabled = tmp & HSW_PWR_WELL_STATE_ENABLED;
        enable_requested = tmp & HSW_PWR_WELL_ENABLE_REQUEST;
@@ -6161,7 +6159,6 @@ void intel_pm_setup(struct drm_device *dev)
 
        mutex_init(&dev_priv->pc8.lock);
        dev_priv->pc8.irqs_disabled = false;
-       dev_priv->pc8.enabled = false;
        INIT_DELAYED_WORK(&dev_priv->rps.delayed_resume_work,
                          intel_gen6_powersave_work);
 }