x86/platform/iosf_mbi: Source cleanup

 - Move the static variables to one place
 - Fix indentations in the header
 - Correct comments

No functional change.

[ tglx: Massaged changelog ]

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: David E . Box <david.e.box@linux.intel.com>
Link: http://lkml.kernel.org/r/1436366709-17683-5-git-send-email-andriy.shevchenko@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

diff --git a/arch/x86/include/asm/iosf_mbi.h b/arch/x86/include/asm/iosf_mbi.h
index 57995f0596a668e56725b3dc195c1a58088b5af8..b72ad0faa6c531b91542701dc72f0175158408f4 100644 (file)
--- a/arch/x86/include/asm/iosf_mbi.h
+++ b/arch/x86/include/asm/iosf_mbi.h
@@ -52,20 +52,20 @@
 
 /* Quark available units */
 #define QRK_MBI_UNIT_HBA       0x00
-#define QRK_MBI_UNIT_HB        0x03
+#define QRK_MBI_UNIT_HB                0x03
 #define QRK_MBI_UNIT_RMU       0x04
-#define QRK_MBI_UNIT_MM        0x05
+#define QRK_MBI_UNIT_MM                0x05
 #define QRK_MBI_UNIT_MMESRAM   0x05
 #define QRK_MBI_UNIT_SOC       0x31
 
 /* Quark read/write opcodes */
 #define QRK_MBI_HBA_READ       0x10
 #define QRK_MBI_HBA_WRITE      0x11
-#define QRK_MBI_HB_READ        0x10
+#define QRK_MBI_HB_READ                0x10
 #define QRK_MBI_HB_WRITE       0x11
 #define QRK_MBI_RMU_READ       0x10
 #define QRK_MBI_RMU_WRITE      0x11
-#define QRK_MBI_MM_READ        0x10
+#define QRK_MBI_MM_READ                0x10
 #define QRK_MBI_MM_WRITE       0x11
 #define QRK_MBI_MMESRAM_READ   0x12
 #define QRK_MBI_MMESRAM_WRITE  0x13

diff --git a/arch/x86/platform/intel/iosf_mbi.c b/arch/x86/platform/intel/iosf_mbi.c
index 0b331051b241985913e449983b6b4d5d373faf87..28fb290ca3250f1b6dfda9d9c484137511759d57 100644 (file)
--- a/arch/x86/platform/intel/iosf_mbi.c
+++ b/arch/x86/platform/intel/iosf_mbi.c
@@ -31,6 +31,7 @@
 #define PCI_DEVICE_ID_BRASWELL         0x2280
 #define PCI_DEVICE_ID_QUARK_X1000      0x0958
 
+static struct pci_dev *mbi_pdev;
 static DEFINE_SPINLOCK(iosf_mbi_lock);
 
 static inline u32 iosf_mbi_form_mcr(u8 op, u8 port, u8 offset)
@@ -38,8 +39,6 @@ static inline u32 iosf_mbi_form_mcr(u8 op, u8 port, u8 offset)
        return (op << 24) | (port << 16) | (offset << 8) | MBI_ENABLE;
 }
 
-static struct pci_dev *mbi_pdev;       /* one mbi device */
-
 static int iosf_mbi_pci_read_mdr(u32 mcrx, u32 mcr, u32 *mdr)
 {
        int result;
@@ -104,7 +103,7 @@ int iosf_mbi_read(u8 port, u8 opcode, u32 offset, u32 *mdr)
        unsigned long flags;
        int ret;
 
-       /*Access to the GFX unit is handled by GPU code */
+       /* Access to the GFX unit is handled by GPU code */
        if (port == BT_MBI_UNIT_GFX) {
                WARN_ON(1);
                return -EPERM;
@@ -127,7 +126,7 @@ int iosf_mbi_write(u8 port, u8 opcode, u32 offset, u32 mdr)
        unsigned long flags;
        int ret;
 
-       /*Access to the GFX unit is handled by GPU code */
+       /* Access to the GFX unit is handled by GPU code */
        if (port == BT_MBI_UNIT_GFX) {
                WARN_ON(1);
                return -EPERM;
@@ -151,7 +150,7 @@ int iosf_mbi_modify(u8 port, u8 opcode, u32 offset, u32 mdr, u32 mask)
        unsigned long flags;
        int ret;
 
-       /*Access to the GFX unit is handled by GPU code */
+       /* Access to the GFX unit is handled by GPU code */
        if (port == BT_MBI_UNIT_GFX) {
                WARN_ON(1);
                return -EPERM;