Merge branch 'clean/late_initcall_v2' of git://git.linaro.org/people/shawnguo/linux...

By Shawn Guo
via Shawn Guo
* 'clean/late_initcall_v2' of git://git.linaro.org/people/shawnguo/linux-2.6:
  ARM: ux500: use machine specific hook for late init
  ARM: tegra: use machine specific hook for late init
  ARM: shmobile: use machine specific hook for late init
  ARM: sa1100: use machine specific hook for late init
  ARM: s3c64xx: use machine specific hook for late init
  ARM: prima2: use machine specific hook for late init
  ARM: pnx4008: use machine specific hook for late init
  ARM: omap2: use machine specific hook for late init
  ARM: omap1: use machine specific hook for late init
  ARM: msm: use machine specific hook for late init
  ARM: imx: use machine specific hook for late init
  ARM: exynos: use machine specific hook for late init
  ARM: ep93xx: use machine specific hook for late init
  ARM: davinci: use machine specific hook for late init
  ARM: provide a late_initcall hook for platform initialization

diff --combined arch/arm/mach-exynos/common.c
index 5ccd6e80a607fec8750409d6d5731dfa92f2a73e,16da00111b294e10870fa2267f1ac12b5da0f664..e3422f7d8dbf2ab8ace774211dcf748868aa32f4
--- 1/arch/arm/mach-exynos/common.c
--- 2/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@@ -285,6 -285,11 +285,11 @@@ void exynos5_restart(char mode, const c
        __raw_writel(0x1, EXYNOS_SWRESET);
  }
  
+ void __init exynos_init_late(void)
+ {
+       exynos_pm_late_initcall();
+ }
+ 
  /*
   * exynos_map_io
   *
@@@ -326,11 -331,6 +331,11 @@@ static void __init exynos4_map_io(void
        s3c_fimc_setname(2, "exynos4-fimc");
        s3c_fimc_setname(3, "exynos4-fimc");
  
 +      s3c_sdhci_setname(0, "exynos4-sdhci");
 +      s3c_sdhci_setname(1, "exynos4-sdhci");
 +      s3c_sdhci_setname(2, "exynos4-sdhci");
 +      s3c_sdhci_setname(3, "exynos4-sdhci");
 +
        /* The I2C bus controllers are directly compatible with s3c2440 */
        s3c_i2c0_setname("s3c2440-i2c");
        s3c_i2c1_setname("s3c2440-i2c");
@@@ -349,11 -349,6 +354,11 @@@ static void __init exynos5_map_io(void
        s3c_device_i2c0.resource[1].start = EXYNOS5_IRQ_IIC;
        s3c_device_i2c0.resource[1].end   = EXYNOS5_IRQ_IIC;
  
 +      s3c_sdhci_setname(0, "exynos4-sdhci");
 +      s3c_sdhci_setname(1, "exynos4-sdhci");
 +      s3c_sdhci_setname(2, "exynos4-sdhci");
 +      s3c_sdhci_setname(3, "exynos4-sdhci");
 +
        /* The I2C bus controllers are directly compatible with s3c2440 */
        s3c_i2c0_setname("s3c2440-i2c");
        s3c_i2c1_setname("s3c2440-i2c");
@@@ -547,9 -542,7 +552,9 @@@ void __init exynos5_init_irq(void
  {
        int irq;
  
 -      gic_init(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU);
 +#ifdef CONFIG_OF
 +      of_irq_init(exynos4_dt_irq_match);
 +#endif
  
        for (irq = 0; irq < EXYNOS5_MAX_COMBINER_NR; irq++) {
                combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq),

diff --combined arch/arm/mach-exynos/mach-nuri.c
index ed90aef404c3175259e4a4ba576e60a6bb018a3f,5d68532997cd000c0ce0f67989dbad0346069008..d57eb806f270e4657c3a0afe3708a30a3970406e
--- 1/arch/arm/mach-exynos/mach-nuri.c
--- 2/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@@ -112,7 -112,6 +112,7 @@@ static struct s3c_sdhci_platdata nuri_h
        .host_caps              = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
                                MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
                                MMC_CAP_ERASE),
 +      .host_caps2             = MMC_CAP2_BROKEN_VOLTAGE,
        .cd_type                = S3C_SDHCI_CD_PERMANENT,
        .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
  };
@@@ -1351,6 -1350,7 +1351,7 @@@ MACHINE_START(NURI, "NURI"
        .map_io         = nuri_map_io,
        .handle_irq     = gic_handle_irq,
        .init_machine   = nuri_machine_init,
+       .init_late      = exynos_init_late,
        .timer          = &exynos4_timer,
        .reserve        = &nuri_reserve,
        .restart        = exynos4_restart,

diff --combined arch/arm/mach-exynos/mach-universal_c210.c
index cb2b027f09a603800477a31bfeb765b27f829942,7c348862545d8a03df904003994336240aa0a907..2cd95aa88751ca2c61756dc6b16146f6e346b770
--- 1/arch/arm/mach-exynos/mach-universal_c210.c
--- 2/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@@ -747,7 -747,6 +747,7 @@@ static struct s3c_sdhci_platdata univer
        .max_width              = 8,
        .host_caps              = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
                                MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
 +      .host_caps2             = MMC_CAP2_BROKEN_VOLTAGE,
        .cd_type                = S3C_SDHCI_CD_PERMANENT,
        .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
  };
@@@ -1113,6 -1112,7 +1113,7 @@@ MACHINE_START(UNIVERSAL_C210, "UNIVERSA
        .map_io         = universal_map_io,
        .handle_irq     = gic_handle_irq,
        .init_machine   = universal_machine_init,
+       .init_late      = exynos_init_late,
        .timer          = &exynos4_timer,
        .reserve        = &universal_reserve,
        .restart        = exynos4_restart,

diff --combined arch/arm/mach-msm/board-msm8x60.c
index fb3496a52ef4c08921de04e75e4682ad00e796a2,62f2c93335a3ff144d14fa62c9bb2571d2e23557..e37a724cd1eb5c1e2703571deb84f0adfc3d28f9
--- 1/arch/arm/mach-msm/board-msm8x60.c
--- 2/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@@ -17,7 -17,6 +17,7 @@@
  #include <linux/irqdomain.h>
  #include <linux/of.h>
  #include <linux/of_address.h>
 +#include <linux/of_irq.h>
  #include <linux/of_platform.h>
  #include <linux/memblock.h>
  
@@@ -50,22 -49,10 +50,22 @@@ static void __init msm8x60_map_io(void
        msm_map_msm8x60_io();
  }
  
 +#ifdef CONFIG_OF
 +static struct of_device_id msm_dt_gic_match[] __initdata = {
 +      { .compatible = "qcom,msm-8660-qgic", .data = gic_of_init },
 +      {}
 +};
 +#endif
 +
  static void __init msm8x60_init_irq(void)
  {
 -      gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE,
 -               (void *)MSM_QGIC_CPU_BASE);
 +      if (!of_have_populated_dt())
 +              gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE,
 +                       (void *)MSM_QGIC_CPU_BASE);
 +#ifdef CONFIG_OF
 +      else
 +              of_irq_init(msm_dt_gic_match);
 +#endif
  
        /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
        writel(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);
@@@ -81,13 -68,26 +81,18 @@@ static void __init msm8x60_init(void
  {
  }
  
+ static void __init msm8x60_init_late(void)
+ {
+       smd_debugfs_init();
+ }
+ 
  #ifdef CONFIG_OF
  static struct of_dev_auxdata msm_auxdata_lookup[] __initdata = {
        {}
  };
  
 -static struct of_device_id msm_dt_gic_match[] __initdata = {
 -      { .compatible = "qcom,msm-8660-qgic", },
 -      {}
 -};
 -
  static void __init msm8x60_dt_init(void)
  {
 -      irq_domain_generate_simple(msm_dt_gic_match, MSM8X60_QGIC_DIST_PHYS,
 -                              GIC_SPI_START);
 -
        if (of_machine_is_compatible("qcom,msm8660-surf")) {
                printk(KERN_INFO "Init surf UART registers\n");
                msm8x60_init_uart12dm();
@@@ -111,6 -111,7 +116,7 @@@ MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X
        .init_irq = msm8x60_init_irq,
        .handle_irq = gic_handle_irq,
        .init_machine = msm8x60_init,
+       .init_late = msm8x60_init_late,
        .timer = &msm_timer,
  MACHINE_END
  
@@@ -121,6 -122,7 +127,7 @@@ MACHINE_START(MSM8X60_SURF, "QCT MSM8X6
        .init_irq = msm8x60_init_irq,
        .handle_irq = gic_handle_irq,
        .init_machine = msm8x60_init,
+       .init_late = msm8x60_init_late,
        .timer = &msm_timer,
  MACHINE_END
  
@@@ -131,6 -133,7 +138,7 @@@ MACHINE_START(MSM8X60_SIM, "QCT MSM8X6
        .init_irq = msm8x60_init_irq,
        .handle_irq = gic_handle_irq,
        .init_machine = msm8x60_init,
+       .init_late = msm8x60_init_late,
        .timer = &msm_timer,
  MACHINE_END
  
@@@ -141,6 -144,7 +149,7 @@@ MACHINE_START(MSM8X60_FFA, "QCT MSM8X6
        .init_irq = msm8x60_init_irq,
        .handle_irq = gic_handle_irq,
        .init_machine = msm8x60_init,
+       .init_late = msm8x60_init_late,
        .timer = &msm_timer,
  MACHINE_END
  
@@@ -150,6 -154,7 +159,7 @@@ DT_MACHINE_START(MSM_DT, "Qualcomm MSM 
        .map_io = msm8x60_map_io,
        .init_irq = msm8x60_init_irq,
        .init_machine = msm8x60_dt_init,
+       .init_late = msm8x60_init_late,
        .timer = &msm_timer,
        .dt_compat = msm8x60_fluid_match,
  MACHINE_END

diff --combined arch/arm/mach-sa1100/generic.c
index 16be4c56abe3ff37a153807b93d066c49c0d94ab,49468e69b1791a68472889afdfa79b778784c2bc..9db3e98e8b85dbf8f4c27106e8c3e5ea76d89ccd
--- 1/arch/arm/mach-sa1100/generic.c
--- 2/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@@ -306,7 -306,7 +306,7 @@@ void sa11x0_register_irda(struct irda_p
  }
  
  static struct resource sa1100_rtc_resources[] = {
 -      DEFINE_RES_MEM(0x90010000, 0x9001003f),
 +      DEFINE_RES_MEM(0x90010000, 0x40),
        DEFINE_RES_IRQ_NAMED(IRQ_RTC1Hz, "rtc 1Hz"),
        DEFINE_RES_IRQ_NAMED(IRQ_RTCAlrm, "rtc alarm"),
  };
@@@ -359,6 -359,10 +359,10 @@@ static int __init sa1100_init(void
  
  arch_initcall(sa1100_init);
  
+ void __init sa11x0_init_late(void)
+ {
+       sa11x0_pm_init();
+ }
  
  /*
   * Common I/O mapping: