ENGR00290601 [iMX6x] Ensure PLL is powered down when bypass rate is requested.

Ensure that PLL is powered down when bypass rate is requested and
power it up when some other rate is requested.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>

diff --git a/arch/arm/mach-imx/clk-pllv3.c b/arch/arm/mach-imx/clk-pllv3.c
index f187052d639d25c1df15079172f994ef4338dc9b..b73756eec5b7fd0359b3b971bd028f76729dc08f 100644 (file)
--- a/arch/arm/mach-imx/clk-pllv3.c
+++ b/arch/arm/mach-imx/clk-pllv3.c
@@ -172,10 +172,11 @@ static int clk_pllv3_set_rate(struct clk_hw *hw, unsigned long rate,
        if (rate == BYPASS_RATE) {
                /* Set the bypass bit. */
                val |= BM_PLL_BYPASS;
+               /* Power down the PLL. */
                if (pll->powerup_set)
-                       val |= BM_PLL_POWER;
-               else
                        val &= ~BM_PLL_POWER;
+               else
+                       val |= BM_PLL_POWER;
                writel_relaxed(val, pll->base);
 
                return 0;