]> git.karo-electronics.de Git - karo-tx-linux.git/commitdiff
ENGR00223679-1 mx6sl_evk: Add pin config for MAX8903
authorRong Dian <b38775@freescale.com>
Mon, 10 Sep 2012 09:55:11 +0000 (17:55 +0800)
committerLothar Waßmann <LW@KARO-electronics.de>
Fri, 24 May 2013 06:35:24 +0000 (08:35 +0200)
Configure PINMUX for max8903 driver on mx6sl_evk board.

Signed-off-by: Rong Dian <b38775@freescale.com>
arch/arm/configs/imx6s_defconfig
arch/arm/mach-mx6/board-mx6sl_common.h
arch/arm/mach-mx6/board-mx6sl_evk.c
arch/arm/plat-mxc/include/mach/iomux-mx6sl.h

index f03e456d73862e2875c6d91186e8c4b0d71dabb0..5f66b3e5e170a79cbab2fb98cdf9149658ace267 100644 (file)
@@ -1287,7 +1287,7 @@ CONFIG_POWER_SUPPLY=y
 # CONFIG_BATTERY_MAX17040 is not set
 # CONFIG_BATTERY_MAX17042 is not set
 # CONFIG_CHARGER_ISP1704 is not set
-CONFIG_CHARGER_MAX8903=y
+CONFIG_SABRESD_MAX8903=y
 # CONFIG_CHARGER_GPIO is not set
 CONFIG_HWMON=y
 # CONFIG_HWMON_VID is not set
@@ -1995,7 +1995,7 @@ CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_VBUS_DRAW=2
 CONFIG_USB_GADGET_SELECTED=y
 CONFIG_USB_GADGET_ARC=y
-CONFIG_IMX_USB_CHARGER=y
+# CONFIG_IMX_USB_CHARGER is not set
 CONFIG_USB_ARC=y
 # CONFIG_USB_GADGET_FSL_USB2 is not set
 # CONFIG_USB_GADGET_FUSB300 is not set
index d005e02cb6ace64d04952c17d78a592ab0e80e08..e5ddcd1868c25a7fc1eb9d2988a7d85a0179610a 100644 (file)
 #define MX6_BRD_SD2_CD         IMX_GPIO_NR(5, 0)       /* SD2_DAT7 */
 #define MX6_BRD_SD3_CD         IMX_GPIO_NR(3, 22)      /* REF_CLK_32K */
 #define MX6_BRD_FEC_PWR_EN     IMX_GPIO_NR(4, 21)      /* FEC_TX_CLK */
+#define MX6_BRD_CHG_FLT        IMX_GPIO_NR(4, 14)      /* ECSPI2_MISO  */
+#define MX6_BRD_CHG_UOK        IMX_GPIO_NR(4, 13)      /* ECSPI2_MOSI */
+#define MX6_BRD_CHG_DOK        IMX_GPIO_NR(4, 13)      /* ECSPI2_MOSI */
+#define MX6_BRD_CHG_STATUS     IMX_GPIO_NR(4, 15)      /* ECSPI2_SS0  */
 
 /* EPDC GPIO pins */
 #define MX6SL_BRD_EPDC_SDDO_0          IMX_GPIO_NR(1, 7)
@@ -213,6 +217,11 @@ static iomux_v3_cfg_t mx6sl_brd_pads[] = {
 
        /* WDOG */
        MX6SL_PAD_WDOG_B__WDOG1_WDOG_B,
+
+       /* Charge */
+       MX6SL_PAD_ECSPI2_MISO__GPIO_4_14,  /* CHG_FLT */
+       MX6SL_PAD_ECSPI2_SS0__GPIO_4_15, /* CHG_STATUS */
+       MX6SL_PAD_ECSPI2_MOSI__GPIO_4_13, /* CHG_UOK ,CHG_DOK*/
 };
 
 static iomux_v3_cfg_t mx6sl_brd_epdc_enable_pads[] = {
index 23fcff57d930efaf4680acdbc41275b99097b499..825217d11b8bc150ca0856b00e3f1628620d34fd 100644 (file)
@@ -52,6 +52,7 @@
 #include <linux/mfd/max17135.h>
 #include <sound/wm8962.h>
 #include <sound/pcm.h>
+#include <linux/power/sabresd_battery.h>
 
 #include <mach/common.h>
 #include <mach/hardware.h>
@@ -1174,6 +1175,33 @@ static void __init elan_ts_init(void)
        gpio_direction_output(MX6SL_BRD_ELAN_CE, 1);
 }
 
+/*
+ *Usually UOK and DOK should have separate
+ *line to differentiate its behaviour (with different
+ * GPIO irq),because connect max8903 pin UOK to
+ *pin DOK from hardware design,cause software cannot
+ *process and distinguish two interrupt, so default
+ *enable dc_valid for ac charger
+ */
+static struct max8903_pdata charger1_data = {
+       .dok = MX6_BRD_CHG_DOK,
+       .uok = MX6_BRD_CHG_UOK,
+       .chg = MX6_BRD_CHG_STATUS,
+       .flt = MX6_BRD_CHG_FLT,
+       .dcm_always_high = true,
+       .dc_valid = true,
+       .usb_valid = false,
+       .feature_flag = 1,
+};
+
+static struct platform_device evk_max8903_charger_1 = {
+       .name   = "max8903-charger",
+       .dev    = {
+               .platform_data = &charger1_data,
+       },
+};
+
+
 #define SNVS_LPCR 0x38
 static void mx6_snvs_poweroff(void)
 {
@@ -1274,7 +1302,8 @@ static void __init mx6_evk_init(void)
        imx6q_add_perfmon(0);
        imx6q_add_perfmon(1);
        imx6q_add_perfmon(2);
-
+       /* Register charger chips */
+       platform_device_register(&evk_max8903_charger_1);
        pm_power_off = mx6_snvs_poweroff;
 }
 
index 296df42d3ef7956ccfa410c5d4f705005c0553c6..90de1dd8f4fb33d58325ba4556c874733b08f798 100755 (executable)
@@ -77,6 +77,9 @@
 #define MX6SL_ADU_PAD_CTRL     (PAD_CTL_PKE | PAD_CTL_PUE |            \
                PAD_CTL_DSE_40ohm | PAD_CTL_PUS_100K_DOWN |             \
                PAD_CTL_HYS | PAD_CTL_SPEED_MED)
+#define MX6SL_CHG_PAD_CTRL     (PAD_CTL_HYS | PAD_CTL_PKE | PAD_CTL_PUE | \
+               PAD_CTL_PUS_47K_UP)
+
 
 #define MX6SL_PAD_AUD_MCLK             0x02A4
 #define MX6SL_PAD_AUD_RXD              0x02AC
                IOMUX_PAD(0x0364, 0x0074, 7, 0x0000, 0, NO_PAD_CTRL)
 
 #define MX6SL_PAD_ECSPI2_MISO__GPIO_4_14                                      \
-               IOMUX_PAD(0x0368, 0x0078, 5, 0x0000, 0, NO_PAD_CTRL)
+               IOMUX_PAD(0x0368, 0x0078, 5, 0x0000, 0, MX6SL_CHG_PAD_CTRL)
 #define MX6SL_PAD_ECSPI2_MISO__USB_USBOTG1_OC                                 \
                IOMUX_PAD(0x0368, 0x0078, 6, 0x0824, 0, NO_PAD_CTRL)
 #define MX6SL_PAD_ECSPI2_MISO__TPSMP_HDATA_23                                 \
 #define MX6SL_PAD_ECSPI2_MOSI__USDHC1_VSELECT                                 \
                IOMUX_PAD(0x036C, 0x007C, 4, 0x0000, 0, MX6SL_USDHC_PAD_CTRL)
 #define MX6SL_PAD_ECSPI2_MOSI__GPIO_4_13                                      \
-               IOMUX_PAD(0x036C, 0x007C, 5, 0x0000, 0, NO_PAD_CTRL)
+               IOMUX_PAD(0x036C, 0x007C, 5, 0x0000, 0, MX6SL_CHG_PAD_CTRL)
 #define MX6SL_PAD_ECSPI2_MOSI__ANATOP_ANATOP_TESTO_1                          \
                IOMUX_PAD(0x036C, 0x007C, 6, 0x0000, 0, NO_PAD_CTRL)
 #define MX6SL_PAD_ECSPI2_MOSI__TPSMP_HDATA_22                                 \
 #define MX6SL_PAD_ECSPI2_SS0__USDHC1_CD                                       \
                IOMUX_PAD(0x0374, 0x0084, 4, 0x0828, 0, MX6SL_USDHC_PAD_CTRL)
 #define MX6SL_PAD_ECSPI2_SS0__GPIO_4_15                                       \
-               IOMUX_PAD(0x0374, 0x0084, 5, 0x0000, 0, NO_PAD_CTRL)
+               IOMUX_PAD(0x0374, 0x0084, 5, 0x0000, 0, MX6SL_CHG_PAD_CTRL)
 #define MX6SL_PAD_ECSPI2_SS0__USB_USBOTG1_PWR                                 \
                IOMUX_PAD(0x0374, 0x0084, 6, 0x0000, 0, NO_PAD_CTRL)
 #define MX6SL_PAD_ECSPI2_SS0__PL301_SIM_MX6SL_PER1_HADDR_24                   \