drm/radeon: update DISPCLK programming for DCE8

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index 4ba5184681eeeca6145f749dfc5f4213835240fa..586c452e623ed76a90a8b724a1ce89de9255c58a 100644 (file)
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -743,7 +743,7 @@ static void atombios_crtc_set_disp_eng_pll(struct radeon_device *rdev,
                         * SetPixelClock provides the dividers
                         */
                        args.v6.ulDispEngClkFreq = cpu_to_le32(dispclk);
-                       if (ASIC_IS_DCE61(rdev))
+                       if (ASIC_IS_DCE61(rdev) || ASIC_IS_DCE8(rdev))
                                args.v6.ucPpll = ATOM_EXT_PLL1;
                        else if (ASIC_IS_DCE6(rdev))
                                args.v6.ucPpll = ATOM_PPLL0;