ARM: sun5i: a13: Merge common controllers into the common DTSI

Some controllers found in the A13 DTSI actually apply to all of the sun5i
family. Move those into the common DTSI so that all SoCs can benefit from
it.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
index fb2ddb9a04c9e8487da6a14975aa9d8ec0c34f70..6f8c508e8e70f95babb523227eee1756574b87f9 100644 (file)
--- a/arch/arm/boot/dts/sun5i-a13.dtsi
+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
@@ -52,21 +52,6 @@
 / {
        interrupt-parent = <&intc>;
 
-       chosen {
-               #address-cells = <1>;
-               #size-cells = <1>;
-               ranges;
-
-               framebuffer@0 {
-                       compatible = "allwinner,simple-framebuffer",
-                                    "simple-framebuffer";
-                       allwinner,pipeline = "de_be0-lcd0";
-                       clocks = <&ccu CLK_AHB_LCD>, <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
-                                <&ccu CLK_TCON_CH0>, <&ccu CLK_DRAM_DE_BE>;
-                       status = "disabled";
-               };
-       };
-
        thermal-zones {
                cpu_thermal {
                        /* milliseconds */
@@ -105,44 +90,6 @@
        };
 
        soc@01c00000 {
-               tcon0: lcd-controller@01c0c000 {
-                       compatible = "allwinner,sun5i-a13-tcon";
-                       reg = <0x01c0c000 0x1000>;
-                       interrupts = <44>;
-                       resets = <&ccu RST_LCD>;
-                       reset-names = "lcd";
-                       clocks = <&ccu CLK_AHB_LCD>,
-                                <&ccu CLK_TCON_CH0>,
-                                <&ccu CLK_TCON_CH1>;
-                       clock-names = "ahb",
-                                     "tcon-ch0",
-                                     "tcon-ch1";
-                       clock-output-names = "tcon-pixel-clock";
-                       status = "disabled";
-
-                       ports {
-                               #address-cells = <1>;
-                               #size-cells = <0>;
-
-                               tcon0_in: port@0 {
-                                       #address-cells = <1>;
-                                       #size-cells = <0>;
-                                       reg = <0>;
-
-                                       tcon0_in_be0: endpoint@0 {
-                                               reg = <0>;
-                                               remote-endpoint = <&be0_out_tcon0>;
-                                       };
-                               };
-
-                               tcon0_out: port@1 {
-                                       #address-cells = <1>;
-                                       #size-cells = <0>;
-                                       reg = <1>;
-                               };
-                       };
-               };
-
                pwm: pwm@01c20e00 {
                        compatible = "allwinner,sun5i-a13-pwm";
                        reg = <0x01c20e00 0xc>;
@@ -151,74 +98,6 @@
                        status = "disabled";
                };
 
-               fe0: display-frontend@01e00000 {
-                       compatible = "allwinner,sun5i-a13-display-frontend";
-                       reg = <0x01e00000 0x20000>;
-                       interrupts = <47>;
-                       clocks = <&ccu CLK_DE_FE>, <&ccu CLK_DE_FE>,
-                                <&ccu CLK_DRAM_DE_FE>;
-                       clock-names = "ahb", "mod",
-                                     "ram";
-                       resets = <&ccu RST_DE_FE>;
-                       status = "disabled";
-
-                       ports {
-                               #address-cells = <1>;
-                               #size-cells = <0>;
-
-                               fe0_out: port@1 {
-                                       #address-cells = <1>;
-                                       #size-cells = <0>;
-                                       reg = <1>;
-
-                                       fe0_out_be0: endpoint@0 {
-                                               reg = <0>;
-                                               remote-endpoint = <&be0_in_fe0>;
-                                       };
-                               };
-                       };
-               };
-
-               be0: display-backend@01e60000 {
-                       compatible = "allwinner,sun5i-a13-display-backend";
-                       reg = <0x01e60000 0x10000>;
-                       clocks = <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
-                                <&ccu CLK_DRAM_DE_BE>;
-                       clock-names = "ahb", "mod",
-                                     "ram";
-                       resets = <&ccu RST_DE_BE>;
-                       status = "disabled";
-
-                       assigned-clocks = <&ccu CLK_DE_BE>;
-                       assigned-clock-rates = <300000000>;
-
-                       ports {
-                               #address-cells = <1>;
-                               #size-cells = <0>;
-
-                               be0_in: port@0 {
-                                       #address-cells = <1>;
-                                       #size-cells = <0>;
-                                       reg = <0>;
-
-                                       be0_in_fe0: endpoint@0 {
-                                               reg = <0>;
-                                               remote-endpoint = <&fe0_out_be0>;
-                                       };
-                               };
-
-                               be0_out: port@1 {
-                                       #address-cells = <1>;
-                                       #size-cells = <0>;
-                                       reg = <1>;
-
-                                       be0_out_tcon0: endpoint@0 {
-                                               reg = <0>;
-                                               remote-endpoint = <&tcon0_in_be0>;
-                                       };
-                               };
-                       };
-               };
        };
 };
 
@@ -244,22 +123,4 @@
 
 &pio {
        compatible = "allwinner,sun5i-a13-pinctrl";
-
-       lcd_rgb666_pins: lcd_rgb666@0 {
-               pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
-                      "PD10", "PD11", "PD12", "PD13", "PD14", "PD15",
-                      "PD18", "PD19", "PD20", "PD21", "PD22", "PD23",
-                      "PD24", "PD25", "PD26", "PD27";
-               function = "lcd0";
-       };
-
-       uart1_pins_a: uart1@0 {
-               pins = "PE10", "PE11";
-               function = "uart1";
-       };
-
-       uart1_pins_b: uart1@1 {
-               pins = "PG3", "PG4";
-               function = "uart1";
-       };
 };

diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi
index 64e780549ecd895570c79a82757e7696595c7fc2..4175d7a50a1b246240d5f2c02d6f2dc42a91b07e 100644 (file)
--- a/arch/arm/boot/dts/sun5i.dtsi
+++ b/arch/arm/boot/dts/sun5i.dtsi
@@ -64,6 +64,21 @@
                };
        };
 
+       chosen {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               framebuffer@0 {
+                       compatible = "allwinner,simple-framebuffer",
+                                    "simple-framebuffer";
+                       allwinner,pipeline = "de_be0-lcd0";
+                       clocks = <&ccu CLK_AHB_LCD>, <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
+                                <&ccu CLK_TCON_CH0>, <&ccu CLK_DRAM_DE_BE>;
+                       status = "disabled";
+               };
+       };
+
        clocks {
                #address-cells = <1>;
                #size-cells = <1>;
@@ -156,6 +171,44 @@
                        #size-cells = <0>;
                };
 
+               tcon0: lcd-controller@01c0c000 {
+                       compatible = "allwinner,sun5i-a13-tcon";
+                       reg = <0x01c0c000 0x1000>;
+                       interrupts = <44>;
+                       resets = <&ccu RST_LCD>;
+                       reset-names = "lcd";
+                       clocks = <&ccu CLK_AHB_LCD>,
+                                <&ccu CLK_TCON_CH0>,
+                                <&ccu CLK_TCON_CH1>;
+                       clock-names = "ahb",
+                                     "tcon-ch0",
+                                     "tcon-ch1";
+                       clock-output-names = "tcon-pixel-clock";
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               tcon0_in: port@0 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+                                       reg = <0>;
+
+                                       tcon0_in_be0: endpoint@0 {
+                                               reg = <0>;
+                                               remote-endpoint = <&be0_out_tcon0>;
+                                       };
+                               };
+
+                               tcon0_out: port@1 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+                                       reg = <1>;
+                               };
+                       };
+               };
+
                mmc0: mmc@01c0f000 {
                        compatible = "allwinner,sun5i-a13-mmc";
                        reg = <0x01c0f000 0x1000>;
@@ -296,6 +349,14 @@
                                function = "lcd0";
                        };
 
+                       lcd_rgb666_pins: lcd_rgb666@0 {
+                               pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
+                                      "PD10", "PD11", "PD12", "PD13", "PD14", "PD15",
+                                      "PD18", "PD19", "PD20", "PD21", "PD22", "PD23",
+                                      "PD24", "PD25", "PD26", "PD27";
+                               function = "lcd0";
+                       };
+
                        mmc0_pins_a: mmc0@0 {
                                pins = "PF0", "PF1", "PF2", "PF3",
                                       "PF4", "PF5";
@@ -331,6 +392,16 @@
                                function = "spi2";
                        };
 
+                       uart1_pins_a: uart1@0 {
+                               pins = "PE10", "PE11";
+                               function = "uart1";
+                       };
+
+                       uart1_pins_b: uart1@1 {
+                               pins = "PG3", "PG4";
+                               function = "uart1";
+                       };
+
                        uart2_pins_a: uart2@0 {
                                pins = "PD2", "PD3";
                                function = "uart2";
@@ -457,5 +528,74 @@
                        interrupts = <82>, <83>;
                        clocks = <&ccu CLK_AHB_HSTIMER>;
                };
+
+               fe0: display-frontend@01e00000 {
+                       compatible = "allwinner,sun5i-a13-display-frontend";
+                       reg = <0x01e00000 0x20000>;
+                       interrupts = <47>;
+                       clocks = <&ccu CLK_DE_FE>, <&ccu CLK_DE_FE>,
+                                <&ccu CLK_DRAM_DE_FE>;
+                       clock-names = "ahb", "mod",
+                                     "ram";
+                       resets = <&ccu RST_DE_FE>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               fe0_out: port@1 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+                                       reg = <1>;
+
+                                       fe0_out_be0: endpoint@0 {
+                                               reg = <0>;
+                                               remote-endpoint = <&be0_in_fe0>;
+                                       };
+                               };
+                       };
+               };
+
+               be0: display-backend@01e60000 {
+                       compatible = "allwinner,sun5i-a13-display-backend";
+                       reg = <0x01e60000 0x10000>;
+                       clocks = <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
+                                <&ccu CLK_DRAM_DE_BE>;
+                       clock-names = "ahb", "mod",
+                                     "ram";
+                       resets = <&ccu RST_DE_BE>;
+                       status = "disabled";
+
+                       assigned-clocks = <&ccu CLK_DE_BE>;
+                       assigned-clock-rates = <300000000>;
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               be0_in: port@0 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+                                       reg = <0>;
+
+                                       be0_in_fe0: endpoint@0 {
+                                               reg = <0>;
+                                               remote-endpoint = <&fe0_out_be0>;
+                                       };
+                               };
+
+                               be0_out: port@1 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+                                       reg = <1>;
+
+                                       be0_out_tcon0: endpoint@0 {
+                                               reg = <0>;
+                                               remote-endpoint = <&tcon0_in_be0>;
+                                       };
+                               };
+                       };
+               };
        };
 };