b43: support bcma core reset on AC-PHY hardware

AC-PHY hardware includes new control 0x3 bits that need to be set to the
0x1 by default.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>

diff --git a/drivers/net/wireless/b43/b43.h b/drivers/net/wireless/b43/b43.h
index 65b2dd80ecd55a41ec9125ccbe674ee424b6781c..0365524398168562df0e9cd7368ce95f107f1786 100644 (file)
--- a/drivers/net/wireless/b43/b43.h
+++ b/drivers/net/wireless/b43/b43.h
@@ -500,6 +500,8 @@ enum {
 #define  B43_BCMA_IOCTL_PHY_BW_10MHZ   0x00000000      /* 10 MHz bandwidth, 40 MHz PHY */
 #define  B43_BCMA_IOCTL_PHY_BW_20MHZ   0x00000040      /* 20 MHz bandwidth, 80 MHz PHY */
 #define  B43_BCMA_IOCTL_PHY_BW_40MHZ   0x00000080      /* 40 MHz bandwidth, 160 MHz PHY */
+#define  B43_BCMA_IOCTL_PHY_BW_80MHZ   0x000000C0      /* 80 MHz bandwidth */
+#define B43_BCMA_IOCTL_DAC             0x00000300      /* Highspeed DAC mode control field */
 #define B43_BCMA_IOCTL_GMODE           0x00002000      /* G Mode Enable */
 
 /* BCMA 802.11 core specific IO status (BCMA_IOST) flags */

diff --git a/drivers/net/wireless/b43/main.c b/drivers/net/wireless/b43/main.c
index d1c397162a6ac9dfb3e4e0c66b0f50912f89319e..1784933573e4abc7e0842290e2305d13a520596a 100644 (file)
--- a/drivers/net/wireless/b43/main.c
+++ b/drivers/net/wireless/b43/main.c
@@ -1262,6 +1262,23 @@ static void b43_bcma_wireless_core_reset(struct b43_wldev *dev, bool gmode)
                flags |= B43_BCMA_IOCTL_GMODE;
        b43_device_enable(dev, flags);
 
+       if (dev->phy.type == B43_PHYTYPE_AC) {
+               u16 tmp;
+
+               tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL);
+               tmp &= ~B43_BCMA_IOCTL_DAC;
+               tmp |= 0x100;
+               bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp);
+
+               tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL);
+               tmp &= ~B43_BCMA_IOCTL_PHY_CLKEN;
+               bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp);
+
+               tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL);
+               tmp |= B43_BCMA_IOCTL_PHY_CLKEN;
+               bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp);
+       }
+
        bcma_core_set_clockmode(dev->dev->bdev, BCMA_CLKMODE_FAST);
        b43_bcma_phy_reset(dev);
        bcma_core_pll_ctl(dev->dev->bdev, req, status, true);