# CONFIG_ARCH_MX503 is not set
# CONFIG_ARCH_MX51 is not set
CONFIG_ARCH_MX6=y
+# CONFIG_MACH_IMX_BLUETOOTH_RFKILL is not set
CONFIG_ARCH_MX6Q=y
CONFIG_FORCE_MAX_ZONEORDER=14
CONFIG_SOC_IMX6Q=y
# Mapping drivers for chip access
#
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
-CONFIG_MTD_PHYSMAP=y
-# CONFIG_MTD_PHYSMAP_COMPAT is not set
+# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_IMX6X_WEIMNOR=y
# CONFIG_MTD_ARM_INTEGRATOR is not set
# CONFIG_MTD_PLATRAM is not set
# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
# CONFIG_TOUCHSCREEN_WM97XX is not set
# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+# CONFIG_TOUCHSCREEN_NOVATEK is not set
# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
# CONFIG_TOUCHSCREEN_TSC2005 is not set
# CONFIG_TOUCHSCREEN_TSC2007 is not set
#
# CONFIG_USB_C67X00_HCD is not set
CONFIG_USB_EHCI_HCD=y
+# CONFIG_FSL_USB_TEST_MODE is not set
CONFIG_USB_EHCI_ARC=y
CONFIG_USB_EHCI_ARC_OTG=y
# CONFIG_USB_EHCI_ARC_HSIC is not set
.platform_data = &m25p32_spi_flash_data,
},
};
+
static void spi_device_init(void)
{
spi_register_board_info(m25p32_spi0_board_info,
.nr_parts = ARRAY_SIZE(mxc_nor_partitions),
};
-static struct platform_device physmap_flash_device = {
- .name = "physmap-flash",
+static struct platform_device imx6x_weimnor_device = {
+ .name = "imx6x-weimnor",
.id = 0,
.dev = {
.platform_data = &nor_flash_data,
unsigned int reg;
void __iomem *nor_reg = MX6_IO_ADDRESS(WEIM_BASE_ADDR);
void __iomem *ccm_reg = MX6_IO_ADDRESS(CCM_BASE_ADDR);
+ struct clk *clk;
+ u32 rate;
- /*CCM_BASE_ADDR + CLKCTL_CCGR6*/
+ /* CLKCTL_CCGR6: Set emi_slow_clock to be on in all modes */
reg = readl(ccm_reg + 0x80);
reg |= 0x00000C00;
writel(reg, ccm_reg + 0x80);
- __raw_writel(0x00620081, nor_reg);
- __raw_writel(0x1C022000, nor_reg + 0x00000008);
+ /* Timing settings below based upon datasheet for M29W256GL7AN6E
+ These setting assume that the EIM_SLOW_CLOCK is set to 132 MHz */
+ clk = clk_get(NULL, "emi_slow_clk");
+ if (IS_ERR(clk))
+ printk(KERN_ERR "emi_slow_clk not found\n");
+
+ rate = clk_get_rate(clk);
+ if (rate != 132000000)
+ printk(KERN_ERR "Warning: emi_slow_clk not set to 132 MHz!"
+ " WEIM NOR timing may be incorrect!\n");
+
+ /* EIM_CS0GCR1: 16-bit port on DATA[31:16], Burst Length 8 words,
+ Chip select enable is set */
+ __raw_writel(0x00020181, nor_reg);
+
+ /* EIM_CS0GCR2: Address hold time is set to cycle after ADV negation */
+ __raw_writel(0x00000001, nor_reg + 0x00000004);
+
+ /* EIM_CS0RCR1: RWSC = 9 EIM Clocks, ADV Negation = 2 EIM Clocks,
+ OE Assertion = 2 EIM Clocks */
+ __raw_writel(0x0a022000, nor_reg + 0x00000008);
+
+ /* EIM_CS0RCR2: APR = Page read enabled, PAT = 4 EIM Clocks */
+ __raw_writel(0x0000c000, nor_reg + 0x0000000c);
+
+ /* EIM_CS0WCR1: WWSC = 8 EIM Clocks, WADVN = 1, WBEA = 1, WBEN = 1,
+ WEA = 1, WEN = 1 */
__raw_writel(0x0804a240, nor_reg + 0x00000010);
+
+ /* EIM_WCR: WDOG_EN = 1, INTPOL = 1 */
+ __raw_writel(0x00000120, nor_reg + 0x00000090);
}
static int max7310_1_setup(struct i2c_client *client,
}
/* SPI */
imx6q_add_ecspi(0, &mx6q_sabreauto_spi_data);
- if (spinor_en)
- spi_device_init();
- else if (weimnor_en) {
- mx6q_setup_weimcs();
- platform_device_register(&physmap_flash_device);
- }
+ if (spinor_en)
+ spi_device_init();
+ else if (weimnor_en) {
+ mx6q_setup_weimcs();
+ platform_device_register(&imx6x_weimnor_device);
+ }
imx6q_add_mxc_hdmi(&hdmi_data);
imx6q_add_anatop_thermal_imx(1, &mx6q_sabreauto_anatop_thermal_data);