pinctrl: add generic pins and functions properties

pinctrl bindings can benefit from generic property names that define
which pins a "pin configuration node" affects, and which mux function
to select onto those pins. Document new properties for this purpose so
that other bindings may refer to them.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
index 31b0cb9de4f2c32dbdedd52394e86548d175fad2..1958ca9f9e5c7f6eb3023a78c115c60f52e16c38 100644 (file)
--- a/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
@@ -138,6 +138,9 @@ structure of the DT nodes that contain these properties.
 
 Supported generic properties are:
 
+pins                   - the list of pins that properties in the node
+                         apply to
+function               - the mux function to select
 bias-disable           - disable any pin bias
 bias-high-impedance    - high impedance mode ("third-state", "floating")
 bias-bus-hold          - latch weakly
@@ -159,6 +162,19 @@ output-high                - set the pin to output mode with high level
 Some of the generic properties take arguments. For those that do, the
 arguments are described below.
 
+- pins takes a list of pin names or IDs as a required argument. The specific
+  binding for the hardware defines:
+  - Whether the entries are integers or strings, and their meaning.
+
+- function takes a list of function names/IDs as a required argument. The
+  specific binding for the hardware defines:
+  - Whether the entries are integers or strings, and their meaning.
+  - Whether only a single entry is allowed (which is applied to all entries
+    in the pins property), or whether there may alternatively be one entry per
+    entry in the pins property, in which case the list lengths must match, and
+    for each list index i, the function at list index i is applied to the pin
+    at list index i.
+
 - bias-pull-up, -down and -pin-default take as optional argument on hardware
   supporting it the pull strength in Ohm. bias-disable will disable the pull.