int __init mx25_clocks_init_dt(void)
{
struct device_node *np;
- void __iomem *base;
- int irq;
unsigned long osc_rate = 24000000;
/* retrieve the freqency of fixed clocks from device tree */
__mx25_clocks_init(osc_rate);
- np = of_find_compatible_node(NULL, NULL, "fsl,imx25-gpt");
- base = of_iomap(np, 0);
- WARN_ON(!base);
- irq = irq_of_parse_and_map(np, 0);
-
- mxc_timer_init(base, irq);
+ mxc_timer_init_dt(of_find_compatible_node(NULL, NULL, "fsl,imx25-gpt"));
return 0;
}
static void __init mx50_clocks_init(struct device_node *np)
{
- void __iomem *base;
unsigned long r;
- int i, irq;
+ int i;
clk[IMX5_CLK_PLL1_SW] = imx_clk_pllv2("pll1_sw", "osc", MX53_DPLL1_BASE);
clk[IMX5_CLK_PLL2_SW] = imx_clk_pllv2("pll2_sw", "osc", MX53_DPLL2_BASE);
r = clk_round_rate(clk[IMX5_CLK_USBOH3_PER_GATE], 54000000);
clk_set_rate(clk[IMX5_CLK_USBOH3_PER_GATE], r);
- np = of_find_compatible_node(NULL, NULL, "fsl,imx50-gpt");
- base = of_iomap(np, 0);
- WARN_ON(!base);
- irq = irq_of_parse_and_map(np, 0);
- mxc_timer_init(base, irq);
+ mxc_timer_init_dt(of_find_compatible_node(NULL, NULL, "fsl,imx50-gpt"));
}
CLK_OF_DECLARE(imx50_ccm, "fsl,imx50-ccm", mx50_clocks_init);
static void __init mx53_clocks_init(struct device_node *np)
{
- int i, irq;
+ int i;
unsigned long r;
- void __iomem *base;
clk[IMX5_CLK_PLL1_SW] = imx_clk_pllv2("pll1_sw", "osc", MX53_DPLL1_BASE);
clk[IMX5_CLK_PLL2_SW] = imx_clk_pllv2("pll2_sw", "osc", MX53_DPLL2_BASE);
r = clk_round_rate(clk[IMX5_CLK_USBOH3_PER_GATE], 54000000);
clk_set_rate(clk[IMX5_CLK_USBOH3_PER_GATE], r);
- np = of_find_compatible_node(NULL, NULL, "fsl,imx53-gpt");
- base = of_iomap(np, 0);
- WARN_ON(!base);
- irq = irq_of_parse_and_map(np, 0);
- mxc_timer_init(base, irq);
+ mxc_timer_init_dt(of_find_compatible_node(NULL, NULL, "fsl,imx53-gpt"));
}
CLK_OF_DECLARE(imx53_ccm, "fsl,imx53-ccm", mx53_clocks_init);
{
struct device_node *np;
void __iomem *base;
- int i, irq;
+ int i;
int ret;
clk[dummy] = imx_clk_fixed("dummy", 0);
/* Set initial power mode */
imx6q_set_lpm(WAIT_CLOCKED);
- np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt");
- base = of_iomap(np, 0);
- WARN_ON(!base);
- irq = irq_of_parse_and_map(np, 0);
- mxc_timer_init(base, irq);
+ mxc_timer_init_dt(of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt"));
}
CLK_OF_DECLARE(imx6q, "fsl,imx6q-ccm", imx6q_clocks_init);
{
struct device_node *np;
void __iomem *base;
- int irq;
int i;
int ret;
imx6q_set_lpm(WAIT_CLOCKED);
np = of_find_compatible_node(NULL, NULL, "fsl,imx6sl-gpt");
- base = of_iomap(np, 0);
- WARN_ON(!base);
- irq = irq_of_parse_and_map(np, 0);
- mxc_timer_init(base, irq);
+ mxc_timer_init_dt(np);
}
CLK_OF_DECLARE(imx6sl, "fsl,imx6sl-ccm", imx6sl_clocks_init);
struct platform_device;
struct pt_regs;
struct clk;
+struct device_node;
enum mxc_cpu_pwr_mode;
void mx1_map_io(void);
void imx53_init_late(void);
void epit_timer_init(void __iomem *base, int irq);
void mxc_timer_init(void __iomem *, int);
+void mxc_timer_init_dt(struct device_node *);
int mx1_clocks_init(unsigned long fref);
int mx21_clocks_init(unsigned long lref, unsigned long fref);
int mx25_clocks_init(void);
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/sched_clock.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
#include <asm/mach/time.h>
/* Make irqs happen */
setup_irq(irq, &mxc_timer_irq);
}
+
+void __init mxc_timer_init_dt(struct device_node *np)
+{
+ void __iomem *base;
+ int irq;
+
+ base = of_iomap(np, 0);
+ WARN_ON(!base);
+ irq = irq_of_parse_and_map(np, 0);
+
+ mxc_timer_init(base, irq);
+}