MIPS: CPC: Add start, stop and running CM3 CPC registers

Add the new CM3 registers for controlling bringing up and powering down
VPs on MIPSR6 cores.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12330/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/include/asm/mips-cpc.h b/arch/mips/include/asm/mips-cpc.h
index e09035239e5383117947fcabe8920cdf8d7608f1..8c519f9827a3036c3a16f3beb60ba182b71665fd 100644 (file)
--- a/arch/mips/include/asm/mips-cpc.h
+++ b/arch/mips/include/asm/mips-cpc.h
@@ -106,6 +106,9 @@ BUILD_CPC_R_(revision,              MIPS_CPC_GCB_OFS + 0x20)
 BUILD_CPC_Cx_RW(cmd,           0x00)
 BUILD_CPC_Cx_RW(stat_conf,     0x08)
 BUILD_CPC_Cx_RW(other,         0x10)
+BUILD_CPC_Cx_RW(vp_stop,       0x20)
+BUILD_CPC_Cx_RW(vp_run,                0x28)
+BUILD_CPC_Cx_RW(vp_running,    0x30)
 
 /* CPC_Cx_CMD register fields */
 #define CPC_Cx_CMD_SHF                         0