ENGR00281036: [MX6SL]Align LPDDR2 freq change code to 8-byte boundary

This patch fixes 4 issues:
1. Add the .align 8 directive to the LPDDR2 freq change code,
else the fncpy() function fails and the kernel does not boot.
2. Loads the correct L2_BASE_ADDR into register in lpddr2 freq change code
3. Fix the warning in clk_imx6sl.c
4. Change dev_WARN to dev_info in busfreq-imx6.c.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>

diff --git a/arch/arm/mach-imx/busfreq-imx6.c b/arch/arm/mach-imx/busfreq-imx6.c
index 53f4ebff52c44a3bfa1c742929d08d6bcd3e4a35..58ecef05e95ac02c63470d50b30bb09895b5f0ac 100644 (file)
--- a/arch/arm/mach-imx/busfreq-imx6.c
+++ b/arch/arm/mach-imx/busfreq-imx6.c
@@ -771,7 +771,7 @@ static int busfreq_probe(struct platform_device *pdev)
        if (cpu_is_imx6q()) {
                if (of_property_read_u32(pdev->dev.of_node, "fsl,med_ddr_freq",
                                &ddr_med_rate)) {
-                       dev_WARN(busfreq_dev,
+                       dev_info(busfreq_dev,
                                        "DDR medium rate not supported.\n");
                        ddr_med_rate = ddr_normal_rate;
                }

diff --git a/arch/arm/mach-imx/clk-imx6sl.c b/arch/arm/mach-imx/clk-imx6sl.c
index 660656c449bc17e6860cbfe935160d1667df91e6..b33cd3d166e0bea1756ffde14ef65797af0ee79c 100644 (file)
--- a/arch/arm/mach-imx/clk-imx6sl.c
+++ b/arch/arm/mach-imx/clk-imx6sl.c
@@ -33,7 +33,6 @@ static const char const *periph_sels[]                = { "pre_periph_sel", "periph_clk2", };
 static const char const *periph2_sels[]                = { "pre_periph2_sel", "periph2_clk2", };
 static const char const *csi_sels[]            = { "osc", "pll2_pfd2", "pll3_120m", "pll3_pfd1", };
 static const char const *lcdif_axi_sels[]      = { "pll2_bus", "pll2_pfd2", "pll3_usb_otg", "pll3_pfd1", };
-static const char const *csi_lcdif_sels[]      = { "mmdc", "pll2_pfd2", "pll3_120m", "pll3_pfd1", };
 static const char const *usdhc_sels[]          = { "pll2_pfd2", "pll2_pfd0", };
 static const char const *ssi_sels[]            = { "pll3_pfd2", "pll3_pfd3", "pll4_audio_div", "dummy", };
 static const char const *perclk_sels[]         = { "ipg", "osc", };

diff --git a/arch/arm/mach-imx/lpddr2_freq_imx6.S b/arch/arm/mach-imx/lpddr2_freq_imx6.S
index 091bfae96478f83d7aaf0b84ee2ac49aa9e0f8b0..975582ec2468f9f4cea0ba916e3660fec0cadd77 100644 (file)
--- a/arch/arm/mach-imx/lpddr2_freq_imx6.S
+++ b/arch/arm/mach-imx/lpddr2_freq_imx6.S
@@ -341,6 +341,7 @@ force_measure1:
  * r1: low_bus_freq_mode flag
  * r2: Pointer to array containing addresses of registers.
  */
+       .align 8
 ENTRY(mx6_lpddr2_freq_change)
 
        push {r4-r10}
@@ -349,7 +350,7 @@ ENTRY(mx6_lpddr2_freq_change)
        ldr     r3, [r4]                        @ANATOP_BASE_ADDR
        ldr     r2, [r4, #0x4]          @CCM_BASE_ADDR
        ldr     r8, [r4, #0x8]          @MMDC_P0_BASE_ADDR
-       ldr     r7, [r4, #0x8]          @L2_BASE_ADDR
+       ldr     r7, [r4, #0xC]          @L2_BASE_ADDR
 
 lpddr2_freq_change:
        adr     r9, lpddr2_freq_change