]> git.karo-electronics.de Git - mv-sheeva.git/commitdiff
agp/intel: restore cache behavior on sandybridge
authorZhenyu Wang <zhenyuw@linux.intel.com>
Tue, 2 Nov 2010 09:30:47 +0000 (17:30 +0800)
committerChris Wilson <chris@chris-wilson.co.uk>
Tue, 2 Nov 2010 10:05:47 +0000 (10:05 +0000)
This restores cache behavior for default AGP_USER_MEMORY as
uncached, and leave default AGP_USER_CACHED_MEMORY as LLC only.
I've seen different cache behavior on one sandybridge desktop CPU vs.
another mobile CPU. Until we figure out how to detect the real cache
config, restore back to the original behavior now.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
drivers/char/agp/intel-gtt.c

index c51efe6f2c7fcad354b8540f9911d52986f10ac4..fc1637c32cb1e031323ffde2534edb8bef63e67e 100644 (file)
@@ -1288,7 +1288,7 @@ static void gen6_write_entry(dma_addr_t addr, unsigned int entry,
        unsigned int gfdt = flags & AGP_USER_CACHED_MEMORY_GFDT;
        u32 pte_flags;
 
-       if (type_mask == AGP_USER_UNCACHED_MEMORY)
+       if (type_mask == AGP_USER_MEMORY)
                pte_flags = GEN6_PTE_UNCACHED | I810_PTE_VALID;
        else if (type_mask == AGP_USER_CACHED_MEMORY_LLC_MLC) {
                pte_flags = GEN6_PTE_LLC_MLC | I810_PTE_VALID;