sanitize_i387_state(target);
return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
- &target->thread.fpu.state->fxsave, 0, -1);
+ &fpu->state->fxsave, 0, -1);
}
int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
sanitize_i387_state(target);
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
- &target->thread.fpu.state->fxsave, 0, -1);
+ &fpu->state->fxsave, 0, -1);
/*
* mxcsr reserved bits must be masked to zero for security reasons.
*/
- target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
+ fpu->state->fxsave.mxcsr &= mxcsr_feature_mask;
/*
* update the header bits in the xsave header, indicating the
* presence of FP and SSE state.
*/
if (cpu_has_xsave)
- target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
+ fpu->state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
return ret;
}
if (ret)
return ret;
- xsave = &target->thread.fpu.state->xsave;
+ xsave = &fpu->state->xsave;
/*
* Copy the 48bytes defined by the software first into the xstate
if (ret)
return ret;
- xsave = &target->thread.fpu.state->xsave;
+ xsave = &fpu->state->xsave;
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, xsave, 0, -1);
/*
* These bits must be zero.
*/
memset(&xsave->xsave_hdr.reserved, 0, 48);
+
return ret;
}
if (!cpu_has_fxsr)
return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
- &target->thread.fpu.state->fsave, 0,
+ &fpu->state->fsave, 0,
-1);
sanitize_i387_state(target);
if (!cpu_has_fxsr)
return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
- &target->thread.fpu.state->fsave, 0,
+ &fpu->state->fsave, 0,
-1);
if (pos > 0 || count < sizeof(env))
* presence of FP.
*/
if (cpu_has_xsave)
- target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
+ fpu->state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
return ret;
}