Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-/*
- Changes:
- 24.08.2002
- Fixed the typo in sis630_access (Thanks to Mark M. Hoffman)
- Changed sis630_transaction.(Thanks to Mark M. Hoffman)
- 18.09.2002
- Added SIS730 as supported.
- 21.09.2002
- Added high_clock module option.If this option is set
- used Host Master Clock 56KHz (default 14KHz).For now we save old Host
- Master Clock and after transaction completed restore (otherwise
- it's confuse BIOS and hung Machine).
- 24.09.2002
- Fixed typo in sis630_access
- Fixed logical error by restoring of Host Master Clock
- 31.07.2003
- Added block data read/write support.
-*/
-
/*
Status: beta
outb(data, smbus_base + reg);
}
-static int sis630_transaction_start(struct i2c_adapter *adap, int size, u8 *oldclock)
+static int sis630_transaction_start(struct i2c_adapter *adap, int size,
+ u8 *oldclock)
{
- int temp;
+ int temp;
/* Make sure the SMBus host is ready to start transmitting. */
temp = sis630_read(SMB_CNT);
if (temp & (SMB_PROBE | SMB_HOSTBUSY)) {
dev_dbg(&adap->dev, "Failed! (%02x)\n", temp);
return -EBUSY;
- } else {
+ } else {
dev_dbg(&adap->dev, "Successful!\n");
}
- }
+ }
/* save old clock, so we can prevent machine for hung */
*oldclock = sis630_read(SMB_CNT);
dev_dbg(&adap->dev, "saved clock 0x%02x\n", *oldclock);
- /* disable timeout interrupt , set Host Master Clock to 56KHz if requested */
+ /* disable timeout interrupt,
+ * set Host Master Clock to 56KHz if requested */
if (high_clock)
sis630_write(SMB_CNT, SMBCLK_SEL);
else
/* clear all status "sticky" bits */
sis630_write(SMB_STS, 0xFF);
- dev_dbg(&adap->dev, "SMB_CNT before clock restore 0x%02x\n", sis630_read(SMB_CNT));
+ dev_dbg(&adap->dev,
+ "SMB_CNT before clock restore 0x%02x\n", sis630_read(SMB_CNT));
/*
* restore old Host Master Clock if high_clock is set
if (high_clock && !(oldclock & SMBCLK_SEL))
sis630_write(SMB_CNT, sis630_read(SMB_CNT) & ~SMBCLK_SEL);
- dev_dbg(&adap->dev, "SMB_CNT after clock restore 0x%02x\n", sis630_read(SMB_CNT));
+ dev_dbg(&adap->dev,
+ "SMB_CNT after clock restore 0x%02x\n", sis630_read(SMB_CNT));
}
static int sis630_transaction(struct i2c_adapter *adap, int size)
return result;
}
-static int sis630_block_data(struct i2c_adapter *adap, union i2c_smbus_data *data, int read_write)
+static int sis630_block_data(struct i2c_adapter *adap,
+ union i2c_smbus_data *data, int read_write)
{
int i, len = 0, rc = 0;
u8 oldclock = 0;
else if (len > 32)
len = 32;
sis630_write(SMB_COUNT, len);
- for (i=1; i <= len; i++) {
- dev_dbg(&adap->dev, "set data 0x%02x\n", data->block[i]);
+ for (i = 1; i <= len; i++) {
+ dev_dbg(&adap->dev,
+ "set data 0x%02x\n", data->block[i]);
/* set data */
- sis630_write(SMB_BYTE+(i-1)%8, data->block[i]);
- if (i==8 || (len<8 && i==len)) {
- dev_dbg(&adap->dev, "start trans len=%d i=%d\n",len ,i);
+ sis630_write(SMB_BYTE + (i - 1) % 8, data->block[i]);
+ if (i == 8 || (len < 8 && i == len)) {
+ dev_dbg(&adap->dev,
+ "start trans len=%d i=%d\n", len, i);
/* first transaction */
rc = sis630_transaction_start(adap,
SIS630_BLOCK_DATA, &oldclock);
if (rc)
return rc;
- }
- else if ((i-1)%8 == 7 || i==len) {
- dev_dbg(&adap->dev, "trans_wait len=%d i=%d\n",len,i);
- if (i>8) {
- dev_dbg(&adap->dev, "clear smbary_sts len=%d i=%d\n",len,i);
+ } else if ((i - 1) % 8 == 7 || i == len) {
+ dev_dbg(&adap->dev,
+ "trans_wait len=%d i=%d\n", len, i);
+ if (i > 8) {
+ dev_dbg(&adap->dev,
+ "clear smbary_sts"
+ " len=%d i=%d\n", len, i);
/*
If this is not first transaction,
we must clear sticky bit.
rc = sis630_transaction_wait(adap,
SIS630_BLOCK_DATA);
if (rc) {
- dev_dbg(&adap->dev, "trans_wait failed\n");
+ dev_dbg(&adap->dev,
+ "trans_wait failed\n");
break;
}
}
}
- }
- else {
+ } else {
/* read request */
data->block[0] = len = 0;
rc = sis630_transaction_start(adap,
if (data->block[0] > 32)
data->block[0] = 32;
- dev_dbg(&adap->dev, "block data read len=0x%x\n", data->block[0]);
+ dev_dbg(&adap->dev,
+ "block data read len=0x%x\n", data->block[0]);
- for (i=0; i < 8 && len < data->block[0]; i++,len++) {
- dev_dbg(&adap->dev, "read i=%d len=%d\n", i, len);
- data->block[len+1] = sis630_read(SMB_BYTE+i);
+ for (i = 0; i < 8 && len < data->block[0]; i++, len++) {
+ dev_dbg(&adap->dev,
+ "read i=%d len=%d\n", i, len);
+ data->block[len + 1] = sis630_read(SMB_BYTE +
+ i);
}
- dev_dbg(&adap->dev, "clear smbary_sts len=%d i=%d\n",len,i);
+ dev_dbg(&adap->dev,
+ "clear smbary_sts len=%d i=%d\n", len, i);
/* clear SMBARY_STS */
sis630_write(SMB_STS, BYTE_DONE_STS);
- } while(len < data->block[0]);
+ } while (len < data->block[0]);
}
sis630_transaction_end(adap, oldclock);
int status;
switch (size) {
- case I2C_SMBUS_QUICK:
- sis630_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
- size = SIS630_QUICK;
- break;
- case I2C_SMBUS_BYTE:
- sis630_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
- if (read_write == I2C_SMBUS_WRITE)
- sis630_write(SMB_CMD, command);
- size = SIS630_BYTE;
- break;
- case I2C_SMBUS_BYTE_DATA:
- sis630_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
- sis630_write(SMB_CMD, command);
- if (read_write == I2C_SMBUS_WRITE)
- sis630_write(SMB_BYTE, data->byte);
- size = SIS630_BYTE_DATA;
- break;
- case I2C_SMBUS_PROC_CALL:
- case I2C_SMBUS_WORD_DATA:
- sis630_write(SMB_ADDR,((addr & 0x7f) << 1) | (read_write & 0x01));
+ case I2C_SMBUS_QUICK:
+ sis630_write(SMB_ADDR,
+ ((addr & 0x7f) << 1) | (read_write & 0x01));
+ size = SIS630_QUICK;
+ break;
+ case I2C_SMBUS_BYTE:
+ sis630_write(SMB_ADDR,
+ ((addr & 0x7f) << 1) | (read_write & 0x01));
+ if (read_write == I2C_SMBUS_WRITE)
sis630_write(SMB_CMD, command);
- if (read_write == I2C_SMBUS_WRITE) {
- sis630_write(SMB_BYTE, data->word & 0xff);
- sis630_write(SMB_BYTE + 1,(data->word & 0xff00) >> 8);
- }
- size = (size == I2C_SMBUS_PROC_CALL ? SIS630_PCALL : SIS630_WORD_DATA);
- break;
- case I2C_SMBUS_BLOCK_DATA:
- sis630_write(SMB_ADDR,((addr & 0x7f) << 1) | (read_write & 0x01));
- sis630_write(SMB_CMD, command);
- size = SIS630_BLOCK_DATA;
- return sis630_block_data(adap, data, read_write);
- default:
- dev_warn(&adap->dev, "Unsupported transaction %d\n",
- size);
- return -EOPNOTSUPP;
+ size = SIS630_BYTE;
+ break;
+ case I2C_SMBUS_BYTE_DATA:
+ sis630_write(SMB_ADDR,
+ ((addr & 0x7f) << 1) | (read_write & 0x01));
+ sis630_write(SMB_CMD, command);
+ if (read_write == I2C_SMBUS_WRITE)
+ sis630_write(SMB_BYTE, data->byte);
+ size = SIS630_BYTE_DATA;
+ break;
+ case I2C_SMBUS_PROC_CALL:
+ case I2C_SMBUS_WORD_DATA:
+ sis630_write(SMB_ADDR,
+ ((addr & 0x7f) << 1) | (read_write & 0x01));
+ sis630_write(SMB_CMD, command);
+ if (read_write == I2C_SMBUS_WRITE) {
+ sis630_write(SMB_BYTE, data->word & 0xff);
+ sis630_write(SMB_BYTE + 1, (data->word & 0xff00) >> 8);
+ }
+ size = (size == I2C_SMBUS_PROC_CALL ?
+ SIS630_PCALL : SIS630_WORD_DATA);
+ break;
+ case I2C_SMBUS_BLOCK_DATA:
+ sis630_write(SMB_ADDR,
+ ((addr & 0x7f) << 1) | (read_write & 0x01));
+ sis630_write(SMB_CMD, command);
+ size = SIS630_BLOCK_DATA;
+ return sis630_block_data(adap, data, read_write);
+ default:
+ dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
+ return -EOPNOTSUPP;
}
status = sis630_transaction(adap, size);
return 0;
}
- switch(size) {
- case SIS630_BYTE:
- case SIS630_BYTE_DATA:
- data->byte = sis630_read(SMB_BYTE);
- break;
- case SIS630_PCALL:
- case SIS630_WORD_DATA:
- data->word = sis630_read(SMB_BYTE) + (sis630_read(SMB_BYTE + 1) << 8);
- break;
+ switch (size) {
+ case SIS630_BYTE:
+ case SIS630_BYTE_DATA:
+ data->byte = sis630_read(SMB_BYTE);
+ break;
+ case SIS630_PCALL:
+ case SIS630_WORD_DATA:
+ data->word = sis630_read(SMB_BYTE) +
+ (sis630_read(SMB_BYTE + 1) << 8);
+ break;
}
return 0;
static u32 sis630_func(struct i2c_adapter *adapter)
{
- return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | I2C_FUNC_SMBUS_BYTE_DATA |
- I2C_FUNC_SMBUS_WORD_DATA | I2C_FUNC_SMBUS_PROC_CALL |
- I2C_FUNC_SMBUS_BLOCK_DATA;
+ return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
+ I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
+ I2C_FUNC_SMBUS_PROC_CALL | I2C_FUNC_SMBUS_BLOCK_DATA;
}
static int sis630_setup(struct pci_dev *sis630_dev)
unsigned short acpi_base;
/* check for supported SiS devices */
- for (i=0; supported[i] > 0 ; i++) {
- if ((dummy = pci_get_device(PCI_VENDOR_ID_SI, supported[i], dummy)))
+ for (i = 0; supported[i] > 0; i++) {
+ dummy = pci_get_device(PCI_VENDOR_ID_SI, supported[i], dummy);
+ if (dummy)
break; /* found */
}
if (dummy) {
pci_dev_put(dummy);
- }
- else if (force) {
- dev_err(&sis630_dev->dev, "WARNING: Can't detect SIS630 compatible device, but "
+ } else if (force) {
+ dev_err(&sis630_dev->dev,
+ "WARNING: Can't detect SIS630 compatible device, but "
"loading because of force option enabled\n");
- }
- else {
+ } else {
return -ENODEV;
}
Enable ACPI first , so we can accsess reg 74-75
in acpi io space and read acpi base addr
*/
- if (pci_read_config_byte(sis630_dev, SIS630_BIOS_CTL_REG,&b)) {
+ if (pci_read_config_byte(sis630_dev, SIS630_BIOS_CTL_REG, &b)) {
dev_err(&sis630_dev->dev, "Error: Can't read bios ctl reg\n");
retval = -ENODEV;
goto exit;
}
/* Determine the ACPI base address */
- if (pci_read_config_word(sis630_dev,SIS630_ACPI_BASE_REG,&acpi_base)) {
- dev_err(&sis630_dev->dev, "Error: Can't determine ACPI base address\n");
+ if (pci_read_config_word(sis630_dev,
+ SIS630_ACPI_BASE_REG, &acpi_base)) {
+ dev_err(&sis630_dev->dev,
+ "Error: Can't determine ACPI base address\n");
retval = -ENODEV;
goto exit;
}
{ 0, }
};
-MODULE_DEVICE_TABLE (pci, sis630_ids);
+MODULE_DEVICE_TABLE(pci, sis630_ids);
static int sis630_probe(struct pci_dev *dev, const struct pci_device_id *id)
{
if (sis630_setup(dev)) {
- dev_err(&dev->dev, "SIS630 comp. bus not detected, module not inserted.\n");
+ dev_err(&dev->dev,
+ "SIS630 compatible bus not detected, "
+ "module not inserted.\n");
return -ENODEV;
}
projects / linux-beck.git / commitdiff