clk: renesas: r8a7796: Add SCIF clocks

Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c
index d94a870de746dbb15f7971330965998eb50867e2..37c1e43904ee678dd97ca4c8febe607ed9481772 100644 (file)
--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
@@ -109,6 +109,11 @@ static const struct cpg_core_clk r8a7796_core_clks[] __initconst = {
 };
 
 static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = {
+       DEF_MOD("scif5",                 202,   R8A7796_CLK_S3D4),
+       DEF_MOD("scif4",                 203,   R8A7796_CLK_S3D4),
+       DEF_MOD("scif3",                 204,   R8A7796_CLK_S3D4),
+       DEF_MOD("scif1",                 206,   R8A7796_CLK_S3D4),
+       DEF_MOD("scif0",                 207,   R8A7796_CLK_S3D4),
        DEF_MOD("sys-dmac2",             217,   R8A7796_CLK_S0D3),
        DEF_MOD("sys-dmac1",             218,   R8A7796_CLK_S0D3),
        DEF_MOD("sys-dmac0",             219,   R8A7796_CLK_S0D3),