serial: sh-sci: Add more Serial Mode Register documentation

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index ec08f1bff7531a23d30d1c4c7c165feb677a0578..65f7173950865c7acf6fe430ca1e5542a0bc10ba 100644 (file)
--- a/drivers/tty/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
@@ -2064,7 +2064,7 @@ static void sci_reset(struct uart_port *port)
 static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
                            struct ktermios *old)
 {
-       unsigned int baud, smr_val = 0, scr_val = 0, i;
+       unsigned int baud, smr_val = SCSMR_ASYNC, scr_val = 0, i;
        unsigned int brr = 255, cks = 0, srr = 15, dl = 0, sccks = 0;
        unsigned int brr1 = 255, cks1 = 0, srr1 = 15, dl1 = 0;
        struct sci_port *s = to_sci_port(port);

diff --git a/drivers/tty/serial/sh-sci.h b/drivers/tty/serial/sh-sci.h
index fb176025042185c44c7ae0ec2eeaa3134393219e..7a4fa185b93ef30792d58a24d7f26dbb2ec0156e 100644 (file)
--- a/drivers/tty/serial/sh-sci.h
+++ b/drivers/tty/serial/sh-sci.h
@@ -35,12 +35,27 @@ enum {
 
 
 /* SCSMR (Serial Mode Register) */
+#define SCSMR_C_A      BIT(7)  /* Communication Mode */
+#define SCSMR_CSYNC    BIT(7)  /*   - Clocked synchronous mode */
+#define SCSMR_ASYNC    0       /*   - Asynchronous mode */
 #define SCSMR_CHR      BIT(6)  /* 7-bit Character Length */
 #define SCSMR_PE       BIT(5)  /* Parity Enable */
 #define SCSMR_ODD      BIT(4)  /* Odd Parity */
 #define SCSMR_STOP     BIT(3)  /* Stop Bit Length */
 #define SCSMR_CKS      0x0003  /* Clock Select */
 
+/* Serial Mode Register, SCIFA/SCIFB only bits */
+#define SCSMR_CKEDG    BIT(12) /* Transmit/Receive Clock Edge Select */
+#define SCSMR_SRC_MASK 0x0700  /* Sampling Control */
+#define SCSMR_SRC_16   0x0000  /* Sampling rate 1/16 */
+#define SCSMR_SRC_5    0x0100  /* Sampling rate 1/5 */
+#define SCSMR_SRC_7    0x0200  /* Sampling rate 1/7 */
+#define SCSMR_SRC_11   0x0300  /* Sampling rate 1/11 */
+#define SCSMR_SRC_13   0x0400  /* Sampling rate 1/13 */
+#define SCSMR_SRC_17   0x0500  /* Sampling rate 1/17 */
+#define SCSMR_SRC_19   0x0600  /* Sampling rate 1/19 */
+#define SCSMR_SRC_27   0x0700  /* Sampling rate 1/27 */
+
 /* Serial Control Register, SCIFA/SCIFB only bits */
 #define SCSCR_TDRQE    BIT(15) /* Tx Data Transfer Request Enable */
 #define SCSCR_RDRQE    BIT(14) /* Rx Data Transfer Request Enable */