u8 *tmp_buf;
int rcount;
int wcount;
- struct davinci_spi_dma *dma_channels;
+ struct davinci_spi_dma dma_channels;
struct davinci_spi_platform_data *pdata;
void (*get_rx)(u32 rx_data, struct davinci_spi *);
struct davinci_spi_dma *davinci_spi_dma;
davinci_spi = spi_master_get_devdata(spi->master);
- davinci_spi_dma = &(davinci_spi->dma_channels[spi->chip_select]);
+ davinci_spi_dma = &davinci_spi->dma_channels;
if (ch_status == DMA_COMPLETE)
edma_stop(davinci_spi_dma->dma_rx_channel);
struct davinci_spi_dma *davinci_spi_dma;
davinci_spi = spi_master_get_devdata(spi->master);
- davinci_spi_dma = &(davinci_spi->dma_channels[spi->chip_select]);
+ davinci_spi_dma = &davinci_spi->dma_channels;
if (ch_status == DMA_COMPLETE)
edma_stop(davinci_spi_dma->dma_tx_channel);
int r;
davinci_spi = spi_master_get_devdata(spi->master);
- davinci_spi_dma = &davinci_spi->dma_channels[spi->chip_select];
+ davinci_spi_dma = &davinci_spi->dma_channels;
sdev = davinci_spi->bitbang.master->dev.parent;
r = edma_alloc_channel(davinci_spi_dma->dma_rx_sync_dev,
clear_io_bits(davinci_spi->base + SPIGCR1,
SPIGCR1_LOOPBACK_MASK);
- if (use_dma && davinci_spi->dma_channels) {
- davinci_spi_dma = &davinci_spi->dma_channels[spi->chip_select];
+ if (use_dma) {
+ davinci_spi_dma = &davinci_spi->dma_channels;
if ((davinci_spi_dma->dma_rx_channel == -1) ||
(davinci_spi_dma->dma_tx_channel == -1))
static void davinci_spi_cleanup(struct spi_device *spi)
{
- struct davinci_spi *davinci_spi = spi_master_get_devdata(spi->master);
- struct davinci_spi_dma *davinci_spi_dma;
-
- davinci_spi_dma = &davinci_spi->dma_channels[spi->chip_select];
-
- if (use_dma && davinci_spi->dma_channels) {
- davinci_spi_dma = &davinci_spi->dma_channels[spi->chip_select];
+ if (use_dma) {
+ struct davinci_spi *davinci_spi =
+ spi_master_get_devdata(spi->master);
+ struct davinci_spi_dma *davinci_spi_dma =
+ &davinci_spi->dma_channels;
if ((davinci_spi_dma->dma_rx_channel != -1)
&& (davinci_spi_dma->dma_tx_channel != -1)) {
davinci_spi = spi_master_get_devdata(spi->master);
sdev = davinci_spi->bitbang.master->dev.parent;
- davinci_spi_dma = &davinci_spi->dma_channels[spi->chip_select];
+ davinci_spi_dma = &davinci_spi->dma_channels;
tx_reg = (unsigned long)davinci_spi->pbase + SPIDAT1;
rx_reg = (unsigned long)davinci_spi->pbase + SPIBUF;
use_dma = 0;
} else {
davinci_spi->bitbang.txrx_bufs = davinci_spi_bufs_dma;
- davinci_spi->dma_channels = kzalloc(master->num_chipselect
- * sizeof(struct davinci_spi_dma), GFP_KERNEL);
- if (davinci_spi->dma_channels == NULL) {
- ret = -ENOMEM;
- goto free_clk;
- }
- for (i = 0; i < master->num_chipselect; i++) {
- davinci_spi->dma_channels[i].dma_rx_channel = -1;
- davinci_spi->dma_channels[i].dma_rx_sync_dev =
- dma_rx_chan;
- davinci_spi->dma_channels[i].dma_tx_channel = -1;
- davinci_spi->dma_channels[i].dma_tx_sync_dev =
- dma_tx_chan;
- davinci_spi->dma_channels[i].eventq = dma_eventq;
- }
+ davinci_spi->dma_channels.dma_rx_channel = -1;
+ davinci_spi->dma_channels.dma_rx_sync_dev = dma_rx_chan;
+ davinci_spi->dma_channels.dma_tx_channel = -1;
+ davinci_spi->dma_channels.dma_tx_sync_dev = dma_tx_chan;
+ davinci_spi->dma_channels.eventq = dma_eventq;
+
dev_info(&pdev->dev, "DaVinci SPI driver in EDMA mode\n"
"Using RX channel = %d , TX channel = %d and "
"event queue = %d", dma_rx_chan, dma_tx_chan,