ARM: imx6q: add vdoa gate clock

Add the missing vdoa gate clock for imx6q.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

diff --git a/Documentation/devicetree/bindings/clock/imx6q-clock.txt b/Documentation/devicetree/bindings/clock/imx6q-clock.txt
index 3066f1811eda25d151b11e1bc613beaafbb9b84d..5a90a724b52069c793b65c8d20899cc304818abd 100644 (file)
--- a/Documentation/devicetree/bindings/clock/imx6q-clock.txt
+++ b/Documentation/devicetree/bindings/clock/imx6q-clock.txt
@@ -214,6 +214,7 @@ clocks and IDs.
        cko2_podf               199
        cko2                    200
        cko                     201
+       vdoa                    202
 
 Examples:
 

diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index ed19b332468b1769712c16f8301996e68bd05d1b..bbafa3ccacb567e075adcf9da3eed24f68b3e75a 100644 (file)
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -251,7 +251,7 @@ enum mx6q_clks {
        ssi2_ipg, ssi3_ipg, rom, usbphy1, usbphy2, ldb_di0_div_3_5, ldb_di1_div_3_5,
        sata_ref, sata_ref_100m, pcie_ref, pcie_ref_125m, enet_ref, usbphy1_gate,
        usbphy2_gate, pll4_post_div, pll5_post_div, pll5_video_div, eim_slow,
-       spdif, cko2_sel, cko2_podf, cko2, cko, clk_max
+       spdif, cko2_sel, cko2_podf, cko2, cko, vdoa, clk_max
 };
 
 static struct clk *clk[clk_max];
@@ -501,6 +501,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
        clk[i2c3]         = imx_clk_gate2("i2c3",          "ipg_per",           base + 0x70, 10);
        clk[iim]          = imx_clk_gate2("iim",           "ipg",               base + 0x70, 12);
        clk[enfc]         = imx_clk_gate2("enfc",          "enfc_podf",         base + 0x70, 14);
+       clk[vdoa]         = imx_clk_gate2("vdoa",          "vdo_axi",           base + 0x70, 26);
        clk[ipu1]         = imx_clk_gate2("ipu1",          "ipu1_podf",         base + 0x74, 0);
        clk[ipu1_di0]     = imx_clk_gate2("ipu1_di0",      "ipu1_di0_sel",      base + 0x74, 2);
        clk[ipu1_di1]     = imx_clk_gate2("ipu1_di1",      "ipu1_di1_sel",      base + 0x74, 4);