ENGR00240988: ARM: imx6q: add dma_zone_size for GPU limit

GPU has a limit on physical address that it accesses, which must be
below 2GiB.  Since i.MX6Q/DL maps system memory at 0x10000000 (offset
256MiB), we set dma_zone_size as (SZ_2G - SZ_256M) to ensure that.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 14ddf5e31dc94088d5955f13ac7b1d984fb24536..943ce138c2fbf73762eb616e1913a20bd2d38429 100644 (file)
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -814,6 +814,7 @@ config SOC_IMX6Q
        select PL310_ERRATA_727915 if CACHE_PL310
        select PL310_ERRATA_769419 if CACHE_PL310
        select PM_OPP if PM
+       select ZONE_DMA
 
        help
          This enables support for Freescale i.MX6 Quad processor.

diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 137ac61881e541e6b7e4575f55f663a0d680038c..e04abe9baafa9e7f5d8bbc722ed11f3560c58773 100644 (file)
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -305,6 +305,12 @@ static const char *imx6q_dt_compat[] __initdata = {
 };
 
 DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad/DualLite (Device Tree)")
+       /*
+        * i.MX6Q/DL maps system memory at 0x10000000 (offset 256MiB), and
+        * GPU has a limit on physical address that it accesses, which must
+        * be below 2GiB.
+        */
+       .dma_zone_size  = (SZ_2G - SZ_256M),
        .smp            = smp_ops(imx_smp_ops),
        .map_io         = imx6q_map_io,
        .init_irq       = imx6q_init_irq,