ENGR00156314-1 [mx6q]gic: add comments to explain start irq offset value

to be more clear why we start irq offset from 29.
and list the irq ID table.

Signed-off-by: Tony Lin <tony.lin@freescale.com>

diff --git a/arch/arm/mach-mx6/irq.c b/arch/arm/mach-mx6/irq.c
index 4633607c1e8787166c7de0ff27b86a269621881b..cf7fdcefa85991665c9d3e1e34a14f102fae3c79 100644 (file)
--- a/arch/arm/mach-mx6/irq.c
+++ b/arch/arm/mach-mx6/irq.c
@@ -48,6 +48,14 @@ void mx6_init_irq(void)
        struct irq_desc *desc;
        unsigned int i;
 
+       /* start offset if private timer irq id, which is 29.
+        * ID table:
+        * Global timer, PPI -> ID27
+        * A legacy nFIQ, PPI -> ID28
+        * Private timer, PPI -> ID29
+        * Watchdog timers, PPI -> ID30
+        * A legacy nIRQ, PPI -> ID31
+        */
        gic_init(0, 29, IO_ADDRESS(IC_DISTRIBUTOR_BASE_ADDR),
                IO_ADDRESS(IC_INTERFACES_BASE_ADDR));