drm/exynos: fimd: add fimd_enable_shadow_channel_path() to cleanup

This function is valid only the SoC has SHADOWCON register
and it should be used together with fimd_enable_video_output()
to match the ENWIN_F bit in WINCON# and C#_EN_F bit in SHADOWCON.

Signed-off-by: YoungJun Cho <yj44.cho@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>

diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index 5cfd251473746e42060ed38f8611907570eb5973..fd7b46959903f30b9dd50d610c5000df3595669d 100644 (file)
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -242,6 +242,19 @@ static void fimd_enable_video_output(struct fimd_context *ctx, int win,
        writel(val, ctx->regs + WINCON(win));
 }
 
+static void fimd_enable_shadow_channel_path(struct fimd_context *ctx, int win,
+                                               bool enable)
+{
+       u32 val = readl(ctx->regs + SHADOWCON);
+
+       if (enable)
+               val |= SHADOWCON_CHx_ENABLE(win);
+       else
+               val &= ~SHADOWCON_CHx_ENABLE(win);
+
+       writel(val, ctx->regs + SHADOWCON);
+}
+
 static void fimd_clear_channel(struct exynos_drm_manager *mgr)
 {
        struct fimd_context *ctx = mgr->ctx;
@@ -256,12 +269,10 @@ static void fimd_clear_channel(struct exynos_drm_manager *mgr)
                if (val & WINCONx_ENWIN) {
                        fimd_enable_video_output(ctx, win, false);
 
-                       /* unprotect windows */
-                       if (ctx->driver_data->has_shadowcon) {
-                               val = readl(ctx->regs + SHADOWCON);
-                               val &= ~SHADOWCON_CHx_ENABLE(win);
-                               writel(val, ctx->regs + SHADOWCON);
-                       }
+                       if (ctx->driver_data->has_shadowcon)
+                               fimd_enable_shadow_channel_path(ctx, win,
+                                                               false);
+
                        ch_enabled = 1;
                }
        }
@@ -759,11 +770,8 @@ static void fimd_win_commit(struct exynos_drm_manager *mgr, int zpos)
 
        fimd_enable_video_output(ctx, win, true);
 
-       if (ctx->driver_data->has_shadowcon) {
-               val = readl(ctx->regs + SHADOWCON);
-               val |= SHADOWCON_CHx_ENABLE(win);
-               writel(val, ctx->regs + SHADOWCON);
-       }
+       if (ctx->driver_data->has_shadowcon)
+               fimd_enable_shadow_channel_path(ctx, win, true);
 
        /* Enable DMA channel and unprotect windows */
        fimd_shadow_protect_win(ctx, win, false);
@@ -779,7 +787,6 @@ static void fimd_win_disable(struct exynos_drm_manager *mgr, int zpos)
        struct fimd_context *ctx = mgr->ctx;
        struct fimd_win_data *win_data;
        int win = zpos;
-       u32 val;
 
        if (win == DEFAULT_ZPOS)
                win = ctx->default_win;
@@ -800,13 +807,10 @@ static void fimd_win_disable(struct exynos_drm_manager *mgr, int zpos)
 
        fimd_enable_video_output(ctx, win, false);
 
-       /* unprotect windows */
-       if (ctx->driver_data->has_shadowcon) {
-               val = readl(ctx->regs + SHADOWCON);
-               val &= ~SHADOWCON_CHx_ENABLE(win);
-               writel(val, ctx->regs + SHADOWCON);
-       }
+       if (ctx->driver_data->has_shadowcon)
+               fimd_enable_shadow_channel_path(ctx, win, false);
 
+       /* unprotect windows */
        fimd_shadow_protect_win(ctx, win, false);
 
        win_data->enabled = false;