]> git.karo-electronics.de Git - karo-tx-linux.git/commitdiff
Merge remote-tracking branch 'at91/at91-next'
authorStephen Rothwell <sfr@canb.auug.org.au>
Tue, 22 Nov 2011 01:22:48 +0000 (12:22 +1100)
committerStephen Rothwell <sfr@canb.auug.org.au>
Tue, 22 Nov 2011 01:22:48 +0000 (12:22 +1100)
Conflicts:
arch/arm/mach-at91/at91cap9.c
arch/arm/mach-at91/at91sam9260.c
arch/arm/mach-at91/at91sam9261.c
arch/arm/mach-at91/at91sam9263.c
arch/arm/mach-at91/at91sam9g45.c
arch/arm/mach-at91/at91sam9rl.c
arch/arm/mach-at91/setup.c

1  2 
arch/arm/mach-at91/at91cap9.c
arch/arm/mach-at91/at91rm9200.c
arch/arm/mach-at91/at91sam9260.c
arch/arm/mach-at91/at91sam9261.c
arch/arm/mach-at91/at91sam9263.c
arch/arm/mach-at91/at91sam9g45.c
arch/arm/mach-at91/at91sam9rl.c
arch/arm/mach-at91/generic.h
arch/arm/mach-at91/setup.c

index 29373397d2df83c6766a5ee87c098ec55c3892df,81a9f38453e542c9918fc9fa51cb2638ed32c3e7..e484a09059b1e04e7925464a646c05f7287e655c
@@@ -333,10 -326,16 +326,16 @@@ static void __init at91cap9_map_io(void
        at91_init_sram(0, AT91CAP9_SRAM_BASE, AT91CAP9_SRAM_SIZE);
  }
  
+ static void __init at91cap9_ioremap_registers(void)
+ {
+       at91_ioremap_shdwc(AT91CAP9_BASE_SHDWC);
+       at91sam926x_ioremap_pit(AT91CAP9_BASE_PIT);
+       at91sam9_ioremap_smc(0, AT91CAP9_BASE_SMC);
+ }
  static void __init at91cap9_initialize(void)
  {
 -      at91_arch_reset = at91cap9_reset;
 +      arm_pm_restart = at91cap9_restart;
-       pm_power_off = at91cap9_poweroff;
        at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1);
  
        /* Register GPIO subsystem */
index 430a9fdc3dbf5e04662802c17f6cba825d1a16da,9163d7d5f76e5ff2e7a311994b9da52254ce7961..99c3174e24a2262d1ff4e5d2cef8a7e54ecef33b
@@@ -307,9 -308,13 +308,13 @@@ static void __init at91rm9200_map_io(vo
        iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
  }
  
+ static void __init at91rm9200_ioremap_registers(void)
+ {
+ }
  static void __init at91rm9200_initialize(void)
  {
 -      at91_arch_reset = at91rm9200_reset;
 +      arm_pm_restart = at91rm9200_restart;
        at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
                        | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3)
                        | (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5)
index ec9e23dbce0f9a996489ca97ad2c3f4b3f002b3b,5e25cef9fa6d779cba8731a5acc7724172b1dff5..9219b297091372bc31f02c6f34705d7d485787b0
@@@ -325,10 -318,16 +318,16 @@@ static void __init at91sam9260_map_io(v
        }
  }
  
+ static void __init at91sam9260_ioremap_registers(void)
+ {
+       at91_ioremap_shdwc(AT91SAM9260_BASE_SHDWC);
+       at91sam926x_ioremap_pit(AT91SAM9260_BASE_PIT);
+       at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC);
+ }
  static void __init at91sam9260_initialize(void)
  {
 -      at91_arch_reset = at91sam9_alt_reset;
 +      arm_pm_restart = at91sam9_alt_restart;
-       pm_power_off = at91sam9260_poweroff;
        at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
                        | (1 << AT91SAM9260_ID_IRQ2);
  
index 19ac7c0729a0bc2d38b1ac9a2dbce81c299f5604,a0538c5c252029f3c30392eeab9e9608740f767b..b85b9ea6017071252a670fdb6e22cb222336055d
@@@ -285,10 -278,16 +278,16 @@@ static void __init at91sam9261_map_io(v
                at91_init_sram(0, AT91SAM9261_SRAM_BASE, AT91SAM9261_SRAM_SIZE);
  }
  
+ static void __init at91sam9261_ioremap_registers(void)
+ {
+       at91_ioremap_shdwc(AT91SAM9261_BASE_SHDWC);
+       at91sam926x_ioremap_pit(AT91SAM9261_BASE_PIT);
+       at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC);
+ }
  static void __init at91sam9261_initialize(void)
  {
 -      at91_arch_reset = at91sam9_alt_reset;
 +      arm_pm_restart = at91sam9_alt_restart;
-       pm_power_off = at91sam9261_poweroff;
        at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
                        | (1 << AT91SAM9261_ID_IRQ2);
  
index 50d016310031aefd557da1323d82549edc9db595,0d90b6a2da1e0e09724e52dd0fb4057adba7f116..c26e0a17e05ca7f8686b8f1e52ca0c2a95975854
@@@ -303,10 -296,17 +296,17 @@@ static void __init at91sam9263_map_io(v
        at91_init_sram(1, AT91SAM9263_SRAM1_BASE, AT91SAM9263_SRAM1_SIZE);
  }
  
+ static void __init at91sam9263_ioremap_registers(void)
+ {
+       at91_ioremap_shdwc(AT91SAM9263_BASE_SHDWC);
+       at91sam926x_ioremap_pit(AT91SAM9263_BASE_PIT);
+       at91sam9_ioremap_smc(0, AT91SAM9263_BASE_SMC0);
+       at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1);
+ }
  static void __init at91sam9263_initialize(void)
  {
 -      at91_arch_reset = at91sam9_alt_reset;
 +      arm_pm_restart = at91sam9_alt_restart;
-       pm_power_off = at91sam9263_poweroff;
        at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);
  
        /* Register GPIO subsystem */
index ff21f7a60c63dfa0e32bbfb3e999783109925e9f,72c3cce075e2625d4d4999c01b85ebf2885bce53..9344da5e94640ee3feba39f88134bb0143e05724
@@@ -338,10 -331,16 +331,16 @@@ static void __init at91sam9g45_map_io(v
        init_consistent_dma_size(SZ_4M);
  }
  
+ static void __init at91sam9g45_ioremap_registers(void)
+ {
+       at91_ioremap_shdwc(AT91SAM9G45_BASE_SHDWC);
+       at91sam926x_ioremap_pit(AT91SAM9G45_BASE_PIT);
+       at91sam9_ioremap_smc(0, AT91SAM9G45_BASE_SMC);
+ }
  static void __init at91sam9g45_initialize(void)
  {
 -      at91_arch_reset = at91sam9g45_reset;
 +      arm_pm_restart = at91sam9g45_restart;
-       pm_power_off = at91sam9g45_poweroff;
        at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0);
  
        /* Register GPIO subsystem */
index 61cbb46f5b0eed6b8bd5a8269efa657696b1e3c2,96247f68b9d242745645c8a6b1acde694f1078b5..d6bcb1da11dfbc004d0c59890d60fef8d3dde27f
@@@ -290,10 -283,16 +283,16 @@@ static void __init at91sam9rl_map_io(vo
        at91_init_sram(0, AT91SAM9RL_SRAM_BASE, sram_size);
  }
  
+ static void __init at91sam9rl_ioremap_registers(void)
+ {
+       at91_ioremap_shdwc(AT91SAM9RL_BASE_SHDWC);
+       at91sam926x_ioremap_pit(AT91SAM9RL_BASE_PIT);
+       at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC);
+ }
  static void __init at91sam9rl_initialize(void)
  {
 -      at91_arch_reset = at91sam9_alt_reset;
 +      arm_pm_restart = at91sam9_alt_restart;
-       pm_power_off = at91sam9rl_poweroff;
        at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);
  
        /* Register GPIO subsystem */
index 7f4503bc4cbb10f89da3b3bf025829ebaa9319b5,40309588f3600a0ce0c779e50b2fba4f1d3b788a..4866b8180d66610d17d6a0576424e19a751995a0
@@@ -57,8 -58,11 +58,11 @@@ extern void at91_irq_suspend(void)
  extern void at91_irq_resume(void);
  
  /* reset */
 -extern void at91sam9_alt_reset(void);
 +extern void at91sam9_alt_restart(char, const char *);
  
+ /* shutdown */
+ extern void at91_ioremap_shdwc(u32 base_addr);
   /* GPIO */
  #define AT91RM9200_PQFP               3       /* AT91RM9200 PQFP package has 3 banks */
  #define AT91RM9200_BGA                4       /* AT91RM9200 BGA package has 4 banks */
index cf98a8f94dc5afd19ee1c1471b79483eaa273dcb,3c309dc59e6f137577abb9f80ef23c18cf65ec0d..adfb3622a7457841a3091b910e32418c0e73c236
@@@ -73,9 -75,24 +75,6 @@@ static struct map_desc at91_io_desc __i
        .type           = MT_DEVICE,
  };
  
- #define AT91_DBGU0    0xfffff200
- #define AT91_DBGU1    0xffffee00
 -void __iomem *at91_ioremap(unsigned long p, size_t size, unsigned int type)
 -{
 -      if (p >= AT91_BASE_SYS && p <= (AT91_BASE_SYS + SZ_16K - 1))
 -              return (void __iomem *)AT91_IO_P2V(p);
 -
 -      return __arm_ioremap_caller(p, size, type, __builtin_return_address(0));
 -}
 -EXPORT_SYMBOL(at91_ioremap);
 -
 -void at91_iounmap(volatile void __iomem *addr)
 -{
 -      unsigned long virt = (unsigned long)addr;
 -
 -      if (virt >= VMALLOC_START && virt < VMALLOC_END)
 -              __iounmap(addr);
 -}
 -EXPORT_SYMBOL(at91_iounmap);
--
  static void __init soc_detect(u32 dbgu_base)
  {
        u32 cidr, socid;