ARM: 7507/1: cache-l2x0.c: save the final aux ctrl value for resuming

There is a bug if l2x0 controller has been enabled when calling
l2x0_init, the aux ctrl register will not be saved in l2x0_saved_regs.
Therefore we will use uninitialized l2x0_saved_regs.aux_ctrl for
resuming later.

In this patch, the aux ctrl value is read and saved after it is
initialized. So we have the real value being set for resuming.

Link: http://lkml.kernel.org/r/1336046857-24133-1-git-send-email-ylmao@marvell.com
Signed-off-by: Yilu Mao <ylmao@marvell.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 2a8e380501e81a2c0bcaf08c8d018f0c9f20050c..97ec2565805a3475585ed6a397b8a1035472a891 100644 (file)
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -368,14 +368,18 @@ void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask)
                /* l2x0 controller is disabled */
                writel_relaxed(aux, l2x0_base + L2X0_AUX_CTRL);
 
-               l2x0_saved_regs.aux_ctrl = aux;
-
                l2x0_inv_all();
 
                /* enable L2X0 */
                writel_relaxed(1, l2x0_base + L2X0_CTRL);
        }
 
+       /* Re-read it in case some bits are reserved. */
+       aux = readl_relaxed(l2x0_base + L2X0_AUX_CTRL);
+
+       /* Save the value for resuming. */
+       l2x0_saved_regs.aux_ctrl = aux;
+
        outer_cache.inv_range = l2x0_inv_range;
        outer_cache.clean_range = l2x0_clean_range;
        outer_cache.flush_range = l2x0_flush_range;