Merge branch 'x86/microcode'

diff --cc arch/x86/Kconfig
Simple merge

diff --cc arch/x86/kernel/Makefile
Simple merge

diff --cc arch/x86/kernel/head_32.S
index 3c3f58a0808fb544987f70372d3ac202d2c75086,2f705307c8d8788c93cd705ce0264b9ee0a65375..73afd11799ca7c10cfa015a3b0c83435a7003e9d
--- 1/arch/x86/kernel/head_32.S
--- 2/arch/x86/kernel/head_32.S
+++ b/arch/x86/kernel/head_32.S
@@@ -299,42 -304,33 +304,48 @@@ ENTRY(startup_32_smp
        movl %eax,%ss
        leal -__PAGE_OFFSET(%ecx),%esp
  
+ #ifdef CONFIG_MICROCODE_EARLY
+       /* Early load ucode on AP. */
+       call load_ucode_ap
+ #endif
+ 
+ 
  default_entry:
 +#define CR0_STATE     (X86_CR0_PE | X86_CR0_MP | X86_CR0_ET | \
 +                       X86_CR0_NE | X86_CR0_WP | X86_CR0_AM | \
 +                       X86_CR0_PG)
 +      movl $(CR0_STATE & ~X86_CR0_PG),%eax
 +      movl %eax,%cr0
 +
 +/*
 + * We want to start out with EFLAGS unambiguously cleared. Some BIOSes leave
 + * bits like NT set. This would confuse the debugger if this code is traced. So
 + * initialize them properly now before switching to protected mode. That means
 + * DF in particular (even though we have cleared it earlier after copying the
 + * command line) because GCC expects it.
 + */
 +      pushl $0
 +      popfl
 +
  /*
 - *    New page tables may be in 4Mbyte page mode and may
 - *    be using the global pages. 
 + * New page tables may be in 4Mbyte page mode and may be using the global pages.
   *
 - *    NOTE! If we are on a 486 we may have no cr4 at all!
 - *    Specifically, cr4 exists if and only if CPUID exists
 - *    and has flags other than the FPU flag set.
 + * NOTE! If we are on a 486 we may have no cr4 at all! Specifically, cr4 exists
 + * if and only if CPUID exists and has flags other than the FPU flag set.
   */
 +      movl $-1,pa(X86_CPUID)          # preset CPUID level
        movl $X86_EFLAGS_ID,%ecx
        pushl %ecx
 -      popfl
 -      pushfl
 -      popl %eax
 -      pushl $0
 -      popfl
 +      popfl                           # set EFLAGS=ID
        pushfl
 -      popl %edx
 -      xorl %edx,%eax
 -      testl %ecx,%eax
 -      jz 6f                   # No ID flag = no CPUID = no CR4
 +      popl %eax                       # get EFLAGS
 +      testl $X86_EFLAGS_ID,%eax       # did EFLAGS.ID remained set?
 +      jz enable_paging                # hw disallowed setting of ID bit
 +                                      # which means no CPUID and no CR4
 +
 +      xorl %eax,%eax
 +      cpuid
 +      movl %eax,pa(X86_CPUID)         # save largest std CPUID function
  
        movl $1,%eax
        cpuid