arm64: dts: ls1012a: Add coreclk

ls1012a has separate input root clocks for core PLLs versus the platform
PLL, with the latter described as sysclk in the hw docs.
Accordingly, update the clock-frequency in sysclk to 125M as platform
input clock.

Signed-off-by: Scott Wood <oss@buserror.net>
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
index 9a2ccd86ec121e8d6c8ab38c5316bb3f865edad9..b1554cbd2c54f4ca08be37f7add0370758b288d9 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
@@ -76,10 +76,17 @@
        sysclk: sysclk {
                compatible = "fixed-clock";
                #clock-cells = <0>;
-               clock-frequency = <100000000>;
+               clock-frequency = <125000000>;
                clock-output-names = "sysclk";
        };
 
+       coreclk: coreclk {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <100000000>;
+               clock-output-names = "coreclk";
+       };
+
        timer {
                compatible = "arm,armv8-timer";
                interrupts = <1 13 IRQ_TYPE_LEVEL_LOW>,/* Physical Secure PPI */
@@ -248,7 +255,8 @@
                        compatible = "fsl,ls1012a-clockgen";
                        reg = <0x0 0x1ee1000 0x0 0x1000>;
                        #clock-cells = <2>;
-                       clocks = <&sysclk>;
+                       clocks = <&sysclk &coreclk>;
+                       clock-names = "sysclk", "coreclk";
                };
 
                tmu: tmu@1f00000 {